SU461419A1 - Device for recognizing and controlling the number of products - Google Patents

Description

The invention relates to computing and can be used in automated control systems.

Device recognition devices are known that include a pulse generator, a frequency divider, memory blocks, shift registers, photosensors, a read pulse shaper, AND elements, the first inputs of which are connected to the outputs of photosensors, the second inputs are connected to the output of the frequency divider, and the outputs are connected to information the inputs of the shift registers, the element is NOT, the input of which is connected to the output of the frequency divider, and the output is connected to the control inputs of the shift registers.

The purpose of the invention is to simplify the device. For this, the proposed device contains an associative memory block, the address inputs of which are connected to the outputs of the shift registers, a control input connected to the output of the read pulse generator, and the outputs connected to the inputs of the memory blocks, the first element OR NOT, the first input of which is connected to the output pulse generator, and the output is connected to the input of a frequency divider, the second element is OR NOT, whose inputs are connected to the outputs of the photosensors, and the output is connected to the input of the read pulse generator and the second input of the first The item OR NOT.

and

The drawing shows a block diagram of the proposed device.

The device contains photo sensors 1, elements AND 2, shift registers 3, associative memory block 4; memory blocks 5, the element ILR1-NOT 6, the pulse generator 7, the element OR-NOT 8, the frequency divider 9, the element NOT 10, the read pulse generator 11.

The device works as follows.

In the initial state, the photosensors 1 prohibit the passage of clock pulses from frequency divider 9 to the information inputs of shift registers 3 through AND 2 elements. The pulses from generator 7 to divider 9 are not supplied due to the inhibitor entering the element OR-NOT 8 from the output of the element OR NOT 6

The part transported by the conveyor (not shown in the drawing) intersects the vertical axis on which the photosensors 1 are located. When one of the photosensors are fixed to the front edge of the product through an OR-NOT 6 element, the permission to impulse is received from the corresponding photo-sensor. from the pulse generator 7. Pulses from the output of the OR-NOT element are fed to the input of the frequency divider 9. From the latter, the clock pulses pass to the input of the AND 2 elements, as well as through the NOT 10 element to the control inputs

shift registers 3. The other inputs of the elements And 2 receive signals from the photosensors 1 (in the case of fixation or movement of the product). From the output of the AND 2 elements, the clock pulses arrive at the record "units in the first bits of the shift registers 3, while the record" units is carried out by the front ones, and the shift by the falling edges of the clock pulses. When all photosensors 1 stop fixing the product, the item OR-NOT 8 is prohibited, and shaper 11 outputs a signal to associative memory block 4. This block searches for the code recorded on shift registers 3, the desired memory block 5, which writes a “unit of information.

Subject invention

A device for recognizing and controlling the number of products, comprising a pulse generator, a frequency divider, memory blocks, shift registers, photo sensors, a read pulse driver, AND elements, the first inputs of which are connected to the outputs of the photosensors, the second inputs are connected to the output of the frequency divider, and the outputs are connected with the information inputs of the shift registers, the elements NOT, whose input is connected to the output of the frequency divider, and the output is connected to the control inputs of the shift registers, characterized in that, in order to simplify It contains an associative memory block whose address inputs are connected to the outputs of the shift registers, the control input is connected to the output of the read pulse generator, and the outputs

connected to the inputs of the memory blocks, the first element OR-NOT, the first input of which is connected to the output of the pulse generator, and the output is connected to the input of the frequency divider, the second element OR-NOT whose inputs

connected to the outputs of the photosensors, and the output is connected to the input of the read pulse driver and the second input of the first element OR NOT.

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