SU1363501A1 - Digital frequency demodulator - Google Patents

Abstract

The invention relates to a data transmission technique. The purpose of the invention is to increase the noise immunity from impulse noise. The digital frequency demodulator consists of a clock pulse generator 1, a driver 2, trigger 4, counter 5, and element 6. To achieve the goal, a single vibrator 3, element HE 7, interval analyzer 8 consisting of a counter, element And, the OR element and the trigger. If at the output of the imaging unit 2, in the absence of information frequencies, there appears a burst of interference pulses, in which there are pulses whose duration is in the range from 1/4 to 3/4 of the duration of the half-period of the low information frequency, then in this case the arrival of the falling edge of the interference pulse At the output of the digital demodulator, a single unit signal is obtained. However, the duration of this signal will be limited by the reset signal from the element AND the analyzer of the interval duration and will not exceed 3/4 of the low frequency information period. 1 hp f-ly. 2 Il. (L oo 05 ate

Description

The invention relates to a data transmission technique and can be used in frequency modulated signal conversion devices.

The purpose of the invention is to improve the noise immunity from impulse noise.

Fig. 1 shows a structural electrical circuit of the proposed digital frequency demodulator; Fig.2 is a structural diagram of the interval duration analyzer.

The digital frequency demodulator consists of a clock pulse generator 1, a driver 2, a one-shot 3, a trigger 4, a counter 5, an AND 6 element, a HE 7 element and an interval duration analyzer consisting of a counter 9, an AND 10 element, an OR 11 element and a trigger 12.

The digital demodulator operates as follows.

A sinusoidal two-frequency information signal input to the driver 2 is converted into a TTL logic signal. The information unit corresponds to high-frequency pulses, and zero - low-frequency pulses. At the gate inputs of the counter 5 and the counter 9 of the analyzer 8 the duration of the intervals from the generator 1 receives the clock pulses, multiples of information frequencies. The sequence of binary signals from the output of the imager 2 is fed to the reset input of the counter 9 and the information input of the trigger 12 of the analyzer 8, the interval duration and through the element NOT 7 - to the reset

the input of the counter 5. Thus, the work- 40 on Vits zero half-period low

This counter 5 is enabled at the time when the output of shaper 2 has a single level, and the operation of counter 9 is when the level is zero. Counters 5 and 9 count the clock pulses and the signal at the output of the element 6 and element 10 of the analyzer 8 for the duration of the intervals when the state reaches the state corresponding to the length of the frequency pulses lying between the two information frequencies.

When at the output of the imaging unit 2 for the half-cycle of the high frequency, the counter 5 performs the counting of the clock pulses and when the value corresponding to 1/2 the duration of the half-cycle of the high frequency is reached, the signal from the intermediate output

arriving at the second input of the analyzer 8 interval duration, sets trigger one 12, at the information input of which there is a high level from the output of shaper 2. The steady state is set to the first output of the analyzer 8 interval duration, goes to the information input of trigger 4. From the falling front a single impulse is triggered by a single-oscillator 3, which forms a short pulse arriving at the gate input of the trigger 4 and a high inf output appears at the output of the digital demodulator rmatsionny level.

When at the output of the imaging unit 2 there is a single low frequency half cycle, the trigger 12 of the analyzer 8 interval duration is set by a signal from the intermediate output of the counter 5. When the state corresponding to the duration of the frequency pulses lying is reached (at the information frequencies, the output element And 6 to Wits the signal that arrives at the third input of the analyzer 8 for the duration of the intervals and through the element OR 11 resets the trigger 12 to the initial zero state. Thus, the pulse that is generated by one ovibratorom 3 at the falling edge of a single pulse

low frequency, does not change the state of the trigger 4, or, if it was set to one, resets it to the zero state. When the shaper 2 output

the information frequency, then the counting of clock pulses is performed by the counter 9 of the analyzer 8 interval durations. Upon reaching the state corresponding to the duration of the frequency pulses lying between the information frequencies, the signal of the AND 10 element turns on a signal that through the OR 11 element goes to the reset input of the trigger 12 and from the second output of the analyzer 8 the interval duration is sent to the reset input of the trigger 4, which additionally causes a reset to the zero state of triggers 12 and 4.

In the absence of information at the input of the digital demodulator, the output of shaper 2 is at a low level. Analyzer 8 counter 9

interval duration continuously counts the clock pulses, and the reset inputs of the flip-flops 4 and 12 periodically, at intervals equal to the half-period of the low information frequency, receive a reset pulse from the output of the And 10 element of the analyzer 8 of the interval duration.

If, at the output of the imaging unit 2, in the absence of information frequencies, a packet of interference pulses, the duration of which is less than 1/4 of the half-period duration of the low (1/2 - high) frequency, is not present, then the information signal will not be generated at the output of the digital demodulator, since when the duration of single pulses is less than 1/2 of the duration of the high-frequency half-period, trigger 12 is not set.

If, at the output of the imaging unit 2, in the absence of information frequencies, a packet of interference pulses, in which there are pulses with a duration greater than 3/4 of the half-period duration of the low information frequency, is present, then the information signal will not be generated at the output of the digital demodulator, because than 3/4 of the low-frequency half-cycle duration, the trigger 12 is reset via the element OR 11 of the analyzer 8 of the interval duration by a signal from the element AND 6, and the trigger 4 upon the arrival of the falling front Pulse interference in a single state has been established.

If at the output of the imaging unit 2, in the absence of information frequencies, a burst of interference pulses appears, in which there are pulses whose duration is 1/4 - 3/4 of the half-period duration of the low information frequency, then when the falling edge of the interference pulse arrives at the output of the digital demodulator, false single signal. However, the duration of a false single signal is limited by a reset signal from the element And 10 analyzer duration

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intervals and does not exceed 3/4 of the period of low information frequency.

Claims (2)

1. A digital frequency demodulator containing a driver, a trigger, a clock pulse generator, the output of which is connected to the first input of the counter, the first and second outputs of which are connected to the first and second inputs of the AND element, respectively, characterized in that, in order to improve the noise immunity from the pulse interference, a one-shot, element NOT and an interval duration analyzer are introduced, the output of the imaging unit connected to the inputs of the one-shot, element NOT and the first input of the interval duration analyzer, the second, third and the fourth inputs of which are connected respectively to the nepBbiM counter output, the output of the And element and the output of the clock, the output of the element is NOT connected to the second input of the counter., the first and second outputs of the analyzer duration of intervals are connected respectively to the first and the second inputs of the trigger, the third input of which is connected to the output of the one-shot. 2. A demodulator according to claim 1, characterized in that the interval duration analyzer consists of a counter, an AND element, an 1ShI element and a trigger ,. the counter outputs are connected to the inputs of the AND element, the output of which is connected to the first input of the OR element and is the first output of the interval duration analyzer, the output of the OR element is connected to the first trigger input, the first input of the counter and the second trigger input are intervals, the second, third and fourth input of which are the third input of the trigger, the second-input element OR and a second counter input, the TpVirrepa output being the second output of the interval duration analyzer. fPu9.2