SU1267397A1 - Information input-output device - Google Patents

Abstract

The device for input-output information relates to the field of computer technology. The I / O device realizes the possibility of an almost unlimited increase in the number of information exchange channels included in it. The essence of the invention is that by including registers in the data transmission paths and commands, the effect of increasing with the extension of the signal propagation delay chains is eliminated. In addition, the use of the structure of distributed priority schemes allows the development of priority equipment along with the connection of new information exchange channels. 7 il.

Description

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The device relates to automation and computing and can be used in computing systems for organizing the exchange of information between computers and subscribers.

The purpose of the invention is to increase the number of connected communication channels.

FIG. 1 shows a functional diagram of the device; in fig. 2 is an interface block diagram; in fig. 3 block selection scheme; in fig. 4 is a control block diagram; in fig. 5.6, 7 - diagrams of the device.

The device contains the first 1 and second 2 registers, information exchange channels 3, each of which contains the selection block 4, the interface block 5, the third 6, the fourth 7 registers, the first 8 and the second 9 triggers, the first 10 and the second 11 switches fifth of the 12 and the sixth 13 registers, the third 14 and fourth 15 triggers, the first 16 and second 17 elements AND, the control unit 18, the comparison unit 19. Additionally in FIG. 1, items 20-52 show the inputs and outputs of the device and the communication channels.

The interface unit 5 contains the seventh register 53, the third switch 54, the third element 55, the counter 56, the decoder 57, the fifth flip-flop 58, the buffer memory (RAM) 59, the eighth and ninth 61 registers.

Block 4 of choice contains the fourth 62 and fifth 63 switches, the first 64 and second 65 elements OR, the fourth 66, fifth 67, sixth 68 and seventh 69 elements AND, adder 70, element NOT 71.

Additionally, in FIG. 3 at 72-75 denotes the block inputs.

The control unit 18 contains the comparison circuit 76, the eighth 77, the ninth 78 the tenth 79, the eleventh 80 and the twelfth 81 elements And, the sixth 82, the seventh 83 and the eighth 84 triggers.

The device works as follows.

The data between the computer and the subscriber, as well as the commands controlling the transfer of this data, pass through transit channels. For each direction of data transmission and for each direction of transmission of commands, as well as for their tracking pulses, a separate bus is used.

The exchange cycle begins with the transfer from the computer to the corresponding information exchange channel (to which the addressed subscriber is connected) the start command, in which the subscriber's address, transfer direction (from or to the computer) and other necessary exchange parameters are indicated. Having received a response readiness command, the computer issues an exchange command that directly controls the transmission of the corresponding portion of data.

5 In each information exchange channel, the comparison unit 19 recognizes its command by the channel number indicated in the command coming from the computer. Commands transmitted to the computer, in intermediate channels using a selection block 4, select their own or someone else's commands, taking into account the established priority, after which the transmission channel is adjusted accordingly

5 data. This setting is retained until the appearance of a computer response signal, signifying the end of the execution of the exchange command.

Commands with their own concurrent pulses, both in the direction of information exchange channels (from a computer) and in the direction of a computer, by analogy with the data, are transmitted for each SI period by one step, i.e. to the subsequent channel

5 (or between the computer and the first channel) where they are recorded in the corresponding triggers (for tracking pulses) or registers (for the commands themselves).

 The command received from the computer to the register 12 of channel 3 is compared to the channel number 3 specified at input 52 in the comparison block 19. If the channel number 3 field coincides with this number, the output signal is equal to. command reception is decided; into register 53 in its conjugation block. At the same time, the opposite signal from the output (not equal) prohibits the passage of signals accompanying commands and data through elements 16 and 17 to the subsequent channels 3. If the numbers do not match, then in the next period the SI command is sent to register 12

55 of the next channel 3, and there the procedure described is repeated.

Claims (1)

In the interface unit, the command is accepted into register 53. After that, the code of the number of exchanges is entered into the counter 56, the start signal is transmitted to the subscriber through output 47 and the switch 54 is configured to transmit the corresponding counter shift signal: upon receiving from the subscriber, the subscriber's sync pulse from the input 45; when a tracking pulse is transmitted to the subscriber from the output of trigger 8 when transmitting data from the BDU59. The start signal allows the passage of shift pulses through the E55 element. The counter 56 generates consecutive addresses BZU 59. At these addresses the data entered from the subscriber in the register 60 is recorded, and in the case of output, the data transmitted to the subscriber through the register 61 is read. After the end of data input from the subscriber, the signal from the output of the decoder 57 clears the indication of the execution of the command (in register 53) and triggers 58, generating a tracking signal for the request command transmitted to the computer. This signal has a duration equal to one SI period. The transmitted command means that the address channel 3 is ready for exchange. It can contain all the necessary computer information. In response, the computer sends the exchange command placed in register 53. This command is used to transfer data to the computer from the OVC 59. The transmission is controlled, the counter 56, the corresponding states of which are allocated by the decoder 57, generating data tracking pulses. The data itself is simultaneously transmitted to the output of the interface unit from the EEU 59 and, together with its tracking signal, is transmitted respectively to switches 10 and 11. Switching of switches is determined by the contents of the command in register 53 of the parser in addressable channel 3. In channel 3 exchanging , switches 10 and 11 are configured to transmit data from their interface block and in the remaining modules to transmit information from another channel. In the first period of the SI, data is advanced to the computer by one step, i.e. in the subsequent channel 3. In each channel 3, the transmitted information is fixed in the next order C in register 7 and trigger 7. Data transmission from the computer also occurs gradually in one step in one SI period. The data is recorded in register 6, and the impulse is maintained in the trigger 8 of each channel 3, and in channel 3, they accumulate in the RAM of the interface block 59. Commands in the device operation mode are transmitted in the same order as during input. The first is the start command transmitted from the computer. In response to it, addressed channel 3 sends a command to reset the data. The exchange command and data are then transmitted. After executing this command, the interface unit starts data transmission through register 61 to the subscriber. The tracking pulses are generated by the counter 56 and the decoder 57 in the process of iterating a given address group of the RAM 59. Claim of the Invention A device for inputting information containing the first frequency counter and the second registers, information exchange channels, each of which contains the interface block, the first and second switches, the first and the second outputs of the interface unit are connected to the first inputs of the first and second switches, respectively, the second inputs of the first and second switches are the tenth and eleventh inputs of the information exchange channel The fourth, seventh and eighth inputs of the interface unit, respectively, the seventh inputs of the information exchange channel, respectively; the fifth and sixth outputs of the interface unit are the eighth and ninth outputs of the information exchange channel, respectively; the third input of the first information exchange channel is connected to the output of the first register and the first and second inputs are the third and fourth inputs of the device, respectively, the first input of the first register is the sixth input of the device, the fourth and fifth inputs of the first information exchange channel it is the second and first inputs of the device, respectively, the first output of the first communication channel is connected to the input of the second register, the output of which is connected to the second input of the first register and is the first output of the device, the second and third outputs of the first communication channel are the second and third the device outputs, respectively, the fourth and fifth outputs of each previous channel of information exchange are connected to the first and second inputs of each subsequent channel of information exchange, respectively, ten The eleventh and eleventh inputs of each subsequent information exchange channel are connected to the second and third outputs of each previous information exchange channel, respectively, characterized in that, in order to increase the number of connected information exchange channels, the sixth registers from the third fto are entered into each information exchange channel through the fourth flip-flops, the comparison unit, the selection unit, the control unit, the first and second elements AND, the first input of the third register is the first input of the information exchange channel, the second input the third register and the first trigger are the fifth input of the information exchange channel, the third input of the third register and the first exit of the first trigger are the second input of the information exchange channel, the first and third inputs of the fifth register and the first input of the third trigger are the third input of the information exchange channel , the second inputs of the fourth, fifth and sixth registers, the second, third and fourth flip-flops and the fifth input of the control unit are the fifth input of the communication channel, the first and second inputs of the selector unit are connected respectively, the first and second inputs of the control unit and are the first output of the channel, information exchange, the outputs of the fourth register and the second trigger are the second and third outputs of the information exchange channel, respectively, the first input of the fourth register is connected to the output of the first switch, the first input of the second trigger and the third input of the fourth register is connected to the output of the second switch, the first output of the control unit is connected to the ninth input of the interface block, the second the output is with the third input, the fourth trigger, the third output is with the third inputs of the first and second switches, the fourth output is the tenth output of the information exchange channel, the first input of the sixth register is the eighth input of the information exchange channel, the third input of the sixth register and the first the fourth trigger input is the ninth input of the information exchange channel, the outputs of the sixth register and the fourth trigger are connected to the third and fourth inputs of the selector, respectively, the output of the third register is connected to the sixth input the interface unit house is the fourth output of the information exchange channel, the output of the first trigger is connected to the fifth input of the interface unit and the second input of the first element I, the output of the fifth register is connected to the first input of the comparison unit by the second input of the interface unit and is The sixth output of the information exchange channel, the third trigger terminal is connected to the third input of the interface unit and the second input of the second element, And the first output of the comparison unit is connected to the first input of the interface unit, and its second output is connected to the first and the inputs of the first and second elements And, the outputs of the first and second elements And are the fifth and seventh outputs of the communication channel, respectively, the third and fourth outputs of the interface block are connected to the second and first inputs of the selector, respectively, the sixth, seventh and tenth outputs each previous communication channel is connected to the third and twelve inputs of each subsequent communication channel, the eighth and ninth inputs of each subsequent communication channel are connected to the first output of each previous channel information exchange, twelve first input channel of information exchange is a fifth input of the device and is connected to a fourth input of the control unit, a third input coupled to a fourth input channel of information exchange. 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