SG177816A1 - Methods of forming bonded semiconductor structures, and semiconductor structures formed by such methods - Google Patents

Methods of forming bonded semiconductor structures, and semiconductor structures formed by such methods Download PDF

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Publication number
SG177816A1
SG177816A1 SG2011042017A SG2011042017A SG177816A1 SG 177816 A1 SG177816 A1 SG 177816A1 SG 2011042017 A SG2011042017 A SG 2011042017A SG 2011042017 A SG2011042017 A SG 2011042017A SG 177816 A1 SG177816 A1 SG 177816A1
Authority
SG
Singapore
Prior art keywords
semiconductor structure
bonding surface
bonding
semiconductor
dielectric material
Prior art date
Application number
SG2011042017A
Other languages
English (en)
Inventor
Mariam Sadaka
Ionut Radu
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/837,326 external-priority patent/US8481406B2/en
Priority claimed from FR1055965A external-priority patent/FR2963159B1/fr
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG177816A1 publication Critical patent/SG177816A1/en

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
SG2011042017A 2010-07-15 2011-06-09 Methods of forming bonded semiconductor structures, and semiconductor structures formed by such methods SG177816A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/837,326 US8481406B2 (en) 2010-07-15 2010-07-15 Methods of forming bonded semiconductor structures
FR1055965A FR2963159B1 (fr) 2010-07-21 2010-07-21 Procedes de formation de structures semi-conductrices liees, et structures semi-conductrices formees par ces procedes

Publications (1)

Publication Number Publication Date
SG177816A1 true SG177816A1 (en) 2012-02-28

Family

ID=45515417

Family Applications (1)

Application Number Title Priority Date Filing Date
SG2011042017A SG177816A1 (en) 2010-07-15 2011-06-09 Methods of forming bonded semiconductor structures, and semiconductor structures formed by such methods

Country Status (4)

Country Link
KR (1) KR101238732B1 (zh)
CN (1) CN102339768B (zh)
SG (1) SG177816A1 (zh)
TW (1) TWI464810B (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8791723B2 (en) * 2012-08-17 2014-07-29 Alpha And Omega Semiconductor Incorporated Three-dimensional high voltage gate driver integrated circuit
KR101395235B1 (ko) 2013-10-31 2014-05-16 (주)실리콘화일 배면광 포토다이오드를 이용한 이미지 센서 및 그 제조방법
US9355205B2 (en) * 2013-12-20 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus of a three dimensional integrated circuit
EP3216050B1 (en) * 2014-11-05 2021-09-08 Corning Incorporated Bottom-up electrolytic via plating method
TWI603393B (zh) * 2015-05-26 2017-10-21 台虹科技股份有限公司 半導體裝置的製造方法
CN106783645A (zh) * 2016-11-29 2017-05-31 东莞市广信知识产权服务有限公司 一种金刚石与GaN晶圆片直接键合的方法
CN107275416A (zh) * 2017-05-09 2017-10-20 浙江大学 一种光探测器及其制备方法
US10917966B2 (en) 2018-01-29 2021-02-09 Corning Incorporated Articles including metallized vias
US10727219B2 (en) * 2018-02-15 2020-07-28 Invensas Bonding Technologies, Inc. Techniques for processing devices
US11296053B2 (en) 2019-06-26 2022-04-05 Invensas Bonding Technologies, Inc. Direct bonded stack structures for increased reliability and improved yield in microelectronics
GB2595447A (en) * 2020-05-18 2021-12-01 Oaklands Plastics Ltd Hoarding panel & method of manufacture

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6902987B1 (en) * 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
FR2816445B1 (fr) * 2000-11-06 2003-07-25 Commissariat Energie Atomique Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible
FR2894990B1 (fr) * 2005-12-21 2008-02-22 Soitec Silicon On Insulator Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede
FR2837981B1 (fr) * 2002-03-28 2005-01-07 Commissariat Energie Atomique Procede de manipulation de couches semiconductrices pour leur amincissement
WO2004061961A1 (en) * 2002-12-31 2004-07-22 Massachusetts Institute Of Technology Multi-layer integrated semiconductor structure having an electrical shielding portion
KR100618837B1 (ko) 2004-06-22 2006-09-01 삼성전자주식회사 웨이퍼 레벨 패키지를 위한 얇은 웨이퍼들의 스택을형성하는 방법
CN100517623C (zh) * 2006-12-05 2009-07-22 中芯国际集成电路制造(上海)有限公司 晶片压焊键合方法及其结构
FR2910177B1 (fr) * 2006-12-18 2009-04-03 Soitec Silicon On Insulator Couche tres fine enterree
JP5512102B2 (ja) * 2007-08-24 2014-06-04 本田技研工業株式会社 半導体装置
FR2931014B1 (fr) 2008-05-06 2010-09-03 Soitec Silicon On Insulator Procede d'assemblage de plaques par adhesion moleculaire
KR101548173B1 (ko) * 2008-09-18 2015-08-31 삼성전자주식회사 실리콘 다이렉트 본딩(sdb)을 이용한 임시 웨이퍼 임시 본딩 방법, 및 그 본딩 방법을 이용한 반도체 소자 및 반도체 소자 제조 방법

Also Published As

Publication number Publication date
CN102339768A (zh) 2012-02-01
CN102339768B (zh) 2015-06-10
TW201212131A (en) 2012-03-16
KR101238732B1 (ko) 2013-03-04
KR20120007960A (ko) 2012-01-25
TWI464810B (zh) 2014-12-11

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