KR101238732B1 - 본딩된 반도체 구조체들을 형성하는 방법들, 및 상기 방법들에 의하여 형성된 반도체 구조체들 - Google Patents
본딩된 반도체 구조체들을 형성하는 방법들, 및 상기 방법들에 의하여 형성된 반도체 구조체들 Download PDFInfo
- Publication number
- KR101238732B1 KR101238732B1 KR1020110060306A KR20110060306A KR101238732B1 KR 101238732 B1 KR101238732 B1 KR 101238732B1 KR 1020110060306 A KR1020110060306 A KR 1020110060306A KR 20110060306 A KR20110060306 A KR 20110060306A KR 101238732 B1 KR101238732 B1 KR 101238732B1
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor structure
- bonding surface
- bonding
- semiconductor
- dielectric material
- Prior art date
Links
Images
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Wire Bonding (AREA)
- Manufacturing & Machinery (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/837,326 US8481406B2 (en) | 2010-07-15 | 2010-07-15 | Methods of forming bonded semiconductor structures |
US12/837,326 | 2010-07-15 | ||
FR1055965A FR2963159B1 (fr) | 2010-07-21 | 2010-07-21 | Procedes de formation de structures semi-conductrices liees, et structures semi-conductrices formees par ces procedes |
FR1055965 | 2010-07-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20120007960A KR20120007960A (ko) | 2012-01-25 |
KR101238732B1 true KR101238732B1 (ko) | 2013-03-04 |
Family
ID=45515417
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020110060306A KR101238732B1 (ko) | 2010-07-15 | 2011-06-21 | 본딩된 반도체 구조체들을 형성하는 방법들, 및 상기 방법들에 의하여 형성된 반도체 구조체들 |
Country Status (4)
Country | Link |
---|---|
KR (1) | KR101238732B1 (zh) |
CN (1) | CN102339768B (zh) |
SG (1) | SG177816A1 (zh) |
TW (1) | TWI464810B (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8791723B2 (en) * | 2012-08-17 | 2014-07-29 | Alpha And Omega Semiconductor Incorporated | Three-dimensional high voltage gate driver integrated circuit |
KR101395235B1 (ko) | 2013-10-31 | 2014-05-16 | (주)실리콘화일 | 배면광 포토다이오드를 이용한 이미지 센서 및 그 제조방법 |
US9355205B2 (en) * | 2013-12-20 | 2016-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus of a three dimensional integrated circuit |
US10932371B2 (en) * | 2014-11-05 | 2021-02-23 | Corning Incorporated | Bottom-up electrolytic via plating method |
TWI603393B (zh) * | 2015-05-26 | 2017-10-21 | 台虹科技股份有限公司 | 半導體裝置的製造方法 |
CN106783645A (zh) * | 2016-11-29 | 2017-05-31 | 东莞市广信知识产权服务有限公司 | 一种金刚石与GaN晶圆片直接键合的方法 |
CN107275416A (zh) * | 2017-05-09 | 2017-10-20 | 浙江大学 | 一种光探测器及其制备方法 |
US10917966B2 (en) | 2018-01-29 | 2021-02-09 | Corning Incorporated | Articles including metallized vias |
US10727219B2 (en) * | 2018-02-15 | 2020-07-28 | Invensas Bonding Technologies, Inc. | Techniques for processing devices |
US11462419B2 (en) | 2018-07-06 | 2022-10-04 | Invensas Bonding Technologies, Inc. | Microelectronic assemblies |
US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
GB2595447A (en) * | 2020-05-18 | 2021-12-01 | Oaklands Plastics Ltd | Hoarding panel & method of manufacture |
US11631647B2 (en) | 2020-06-30 | 2023-04-18 | Adeia Semiconductor Bonding Technologies Inc. | Integrated device packages with integrated device die and dummy element |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030211705A1 (en) | 2000-02-16 | 2003-11-13 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
KR100618837B1 (ko) | 2004-06-22 | 2006-09-01 | 삼성전자주식회사 | 웨이퍼 레벨 패키지를 위한 얇은 웨이퍼들의 스택을형성하는 방법 |
WO2009135800A2 (en) | 2008-05-06 | 2009-11-12 | S.O.I. Tec Silicon On Insulator Technologies | A method of assembling wafers by molecular bonding |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2816445B1 (fr) * | 2000-11-06 | 2003-07-25 | Commissariat Energie Atomique | Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible |
FR2894990B1 (fr) * | 2005-12-21 | 2008-02-22 | Soitec Silicon On Insulator | Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede |
FR2837981B1 (fr) * | 2002-03-28 | 2005-01-07 | Commissariat Energie Atomique | Procede de manipulation de couches semiconductrices pour leur amincissement |
US7067909B2 (en) * | 2002-12-31 | 2006-06-27 | Massachusetts Institute Of Technology | Multi-layer integrated semiconductor structure having an electrical shielding portion |
CN100517623C (zh) * | 2006-12-05 | 2009-07-22 | 中芯国际集成电路制造(上海)有限公司 | 晶片压焊键合方法及其结构 |
FR2910177B1 (fr) * | 2006-12-18 | 2009-04-03 | Soitec Silicon On Insulator | Couche tres fine enterree |
JP5512102B2 (ja) * | 2007-08-24 | 2014-06-04 | 本田技研工業株式会社 | 半導体装置 |
KR101548173B1 (ko) * | 2008-09-18 | 2015-08-31 | 삼성전자주식회사 | 실리콘 다이렉트 본딩(sdb)을 이용한 임시 웨이퍼 임시 본딩 방법, 및 그 본딩 방법을 이용한 반도체 소자 및 반도체 소자 제조 방법 |
-
2011
- 2011-06-09 SG SG2011042017A patent/SG177816A1/en unknown
- 2011-06-20 TW TW100121505A patent/TWI464810B/zh active
- 2011-06-21 KR KR1020110060306A patent/KR101238732B1/ko active IP Right Grant
- 2011-07-14 CN CN201110197168.2A patent/CN102339768B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030211705A1 (en) | 2000-02-16 | 2003-11-13 | Ziptronix, Inc. | Method for low temperature bonding and bonded structure |
KR100618837B1 (ko) | 2004-06-22 | 2006-09-01 | 삼성전자주식회사 | 웨이퍼 레벨 패키지를 위한 얇은 웨이퍼들의 스택을형성하는 방법 |
WO2009135800A2 (en) | 2008-05-06 | 2009-11-12 | S.O.I. Tec Silicon On Insulator Technologies | A method of assembling wafers by molecular bonding |
Also Published As
Publication number | Publication date |
---|---|
TWI464810B (zh) | 2014-12-11 |
KR20120007960A (ko) | 2012-01-25 |
SG177816A1 (en) | 2012-02-28 |
CN102339768A (zh) | 2012-02-01 |
CN102339768B (zh) | 2015-06-10 |
TW201212131A (en) | 2012-03-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101238732B1 (ko) | 본딩된 반도체 구조체들을 형성하는 방법들, 및 상기 방법들에 의하여 형성된 반도체 구조체들 | |
US8481406B2 (en) | Methods of forming bonded semiconductor structures | |
US11908739B2 (en) | Flat metal features for microelectronics applications | |
US20230132632A1 (en) | Diffusion barriers and method of forming same | |
JP6887811B2 (ja) | 室温金属直接ボンディング | |
US9553014B2 (en) | Bonded processed semiconductor structures and carriers | |
Park et al. | Two-step plasma treatment on copper surface for low-temperature Cu thermo-compression bonding | |
KR20230126736A (ko) | 전도성 특징부를 갖는 구조 및 그 형성방법 | |
KR101311332B1 (ko) | 임시 반도체 구조 본딩 방법들 및 관련 본딩된 반도체 구조들 | |
TW201740470A (zh) | 用於浸潤接合之系統及方法 | |
JP2018125325A (ja) | 半導体装置及びその製造方法 | |
JP2013537363A (ja) | 犠牲材料を使用して半導体構造体中にウェーハ貫通相互接続部を形成する方法、及びかかる方法により形成される半導体構造体 | |
Peng et al. | Fine-pitch bump-less Cu-Cu bonding for wafer-on-wafer stacking and its quality enhancement | |
TW202429589A (zh) | 具有鋁特徵的直接結合金屬結構及其製備方法 | |
WO2024145034A1 (en) | Directly bonded metal structures having aluminum features and methods of preparing same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20160201 Year of fee payment: 4 |
|
FPAY | Annual fee payment |
Payment date: 20170213 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20180212 Year of fee payment: 6 |
|
FPAY | Annual fee payment |
Payment date: 20190207 Year of fee payment: 7 |