SG173447A1 - Semiconductor chip with reinforcement layer - Google Patents
Semiconductor chip with reinforcement layer Download PDFInfo
- Publication number
- SG173447A1 SG173447A1 SG2011053386A SG2011053386A SG173447A1 SG 173447 A1 SG173447 A1 SG 173447A1 SG 2011053386 A SG2011053386 A SG 2011053386A SG 2011053386 A SG2011053386 A SG 2011053386A SG 173447 A1 SG173447 A1 SG 173447A1
- Authority
- SG
- Singapore
- Prior art keywords
- semiconductor chip
- channel
- frame portion
- polymer layer
- forming
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/856—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/388,092 US7897433B2 (en) | 2009-02-18 | 2009-02-18 | Semiconductor chip with reinforcement layer and method of making the same |
| PCT/US2010/024462 WO2010096473A2 (en) | 2009-02-18 | 2010-02-17 | Semiconductor chip with reinforcement layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG173447A1 true SG173447A1 (en) | 2011-09-29 |
Family
ID=42224974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG2011053386A SG173447A1 (en) | 2009-02-18 | 2010-02-17 | Semiconductor chip with reinforcement layer |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7897433B2 (https=) |
| EP (1) | EP2399284B1 (https=) |
| JP (1) | JP5576885B2 (https=) |
| KR (1) | KR101308100B1 (https=) |
| CN (1) | CN102318051B (https=) |
| SG (1) | SG173447A1 (https=) |
| WO (1) | WO2010096473A2 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8058108B2 (en) | 2010-03-10 | 2011-11-15 | Ati Technologies Ulc | Methods of forming semiconductor chip underfill anchors |
| US8476115B2 (en) | 2011-05-03 | 2013-07-02 | Stats Chippac, Ltd. | Semiconductor device and method of mounting cover to semiconductor die and interposer with adhesive material |
| US8624404B1 (en) | 2012-06-25 | 2014-01-07 | Advanced Micro Devices, Inc. | Integrated circuit package having offset vias |
| US8937009B2 (en) | 2013-04-25 | 2015-01-20 | International Business Machines Corporation | Far back end of the line metallization method and structures |
| TWI467711B (zh) * | 2013-09-10 | 2015-01-01 | 頎邦科技股份有限公司 | 半導體結構 |
| US9466547B1 (en) | 2015-06-09 | 2016-10-11 | Globalfoundries Inc. | Passivation layer topography |
| US9589920B2 (en) * | 2015-07-01 | 2017-03-07 | Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. | Chip package |
| US9779940B2 (en) * | 2015-07-01 | 2017-10-03 | Zhuahai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. | Chip package |
| US20200251683A1 (en) * | 2019-01-31 | 2020-08-06 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Organic light emitting diode display panel and preparation method thereof |
| EP3800660B1 (en) | 2019-10-02 | 2025-02-19 | STMicroelectronics S.r.l. | Silicon carbide power device with improved robustness and corresponding manufacturing process |
| US11990408B2 (en) * | 2020-03-27 | 2024-05-21 | Intel Corporation | WLCSP reliability improvement for package edges including package shielding |
| KR102798789B1 (ko) | 2020-07-09 | 2025-04-22 | 삼성전자주식회사 | 반도체 패키지 |
| CN114141614B (zh) | 2020-09-04 | 2025-11-04 | 意法半导体股份有限公司 | 电子设备元件制造方法、相关元件、电子设备和电子装置 |
| JP7758501B2 (ja) | 2020-09-04 | 2025-10-22 | エスティーマイクロエレクトロニクス エス.アール.エル. | 信頼性を改善した電子装置の要素の製造方法、及び関連要素、電子装置、及び電子機器 |
| JP2026510132A (ja) | 2022-10-31 | 2026-04-01 | キョーセラ・エーブイエックス・コンポーネンツ・コーポレーション | 多層コンデンサ |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03133161A (ja) * | 1989-10-19 | 1991-06-06 | Toshiba Corp | 半導体装置 |
| US5861658A (en) | 1996-10-03 | 1999-01-19 | International Business Machines Corporation | Inorganic seal for encapsulation of an organic layer and method for making the same |
| US6022791A (en) | 1997-10-15 | 2000-02-08 | International Business Machines Corporation | Chip crack stop |
| US6324069B1 (en) | 1997-10-29 | 2001-11-27 | Hestia Technologies, Inc. | Chip package with molded underfill |
| US6049124A (en) | 1997-12-10 | 2000-04-11 | Intel Corporation | Semiconductor package |
| JP2000269386A (ja) | 1999-03-15 | 2000-09-29 | Texas Instr Japan Ltd | 半導体装置 |
| JP3521383B2 (ja) * | 1999-04-28 | 2004-04-19 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| US6122171A (en) | 1999-07-30 | 2000-09-19 | Micron Technology, Inc. | Heat sink chip package and method of making |
| US7267148B2 (en) * | 1999-08-10 | 2007-09-11 | Michelin Recherche Et Technique S.A. | Measurement of adherence between a vehicle wheel and the roadway |
| JP2002270735A (ja) | 2001-03-13 | 2002-09-20 | Nec Corp | 半導体装置及びその製造方法 |
| JP4088120B2 (ja) | 2002-08-12 | 2008-05-21 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP2004200532A (ja) * | 2002-12-20 | 2004-07-15 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP4346333B2 (ja) | 2003-03-26 | 2009-10-21 | 新光電気工業株式会社 | 半導体素子を内蔵した多層回路基板の製造方法 |
| US7223673B2 (en) * | 2004-07-15 | 2007-05-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing semiconductor device with crack prevention ring |
| JP2006041239A (ja) * | 2004-07-28 | 2006-02-09 | Toshiba Corp | 配線基板及び磁気ディスク装置 |
| DE102005003390B4 (de) | 2005-01-24 | 2007-09-13 | Qimonda Ag | Substrat für ein FBGA-Halbleiterbauelement |
| JP4675147B2 (ja) * | 2005-05-10 | 2011-04-20 | パナソニック株式会社 | 半導体装置 |
| US20060278957A1 (en) | 2005-06-09 | 2006-12-14 | Zong-Huei Lin | Fabrication of semiconductor integrated circuit chips |
| CN100461408C (zh) | 2005-09-28 | 2009-02-11 | 中芯国际集成电路制造(上海)有限公司 | 带有密封环拐角结构的集成电路器件 |
| TWI275187B (en) * | 2005-11-30 | 2007-03-01 | Advanced Semiconductor Eng | Flip chip package and manufacturing method of the same |
| JP5118300B2 (ja) | 2005-12-20 | 2013-01-16 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
| JP2008078382A (ja) | 2006-09-21 | 2008-04-03 | Toshiba Corp | 半導体装置とその製造方法 |
| US8736039B2 (en) | 2006-10-06 | 2014-05-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stacked structures and methods of forming stacked structures |
| US20080169555A1 (en) | 2007-01-16 | 2008-07-17 | Ati Technologies Ulc | Anchor structure for an integrated circuit |
| US7732932B2 (en) | 2007-08-03 | 2010-06-08 | International Business Machines Corporation | Semiconductor chips with crack stop regions for reducing crack propagation from chip edges/corners |
| KR100910233B1 (ko) | 2008-01-02 | 2009-07-31 | 주식회사 하이닉스반도체 | 적층 웨이퍼 레벨 패키지 |
| US8441804B2 (en) | 2008-07-25 | 2013-05-14 | Infineon Technologies Ag | Semiconductor device and method of manufacturing a semiconductor device |
-
2009
- 2009-02-18 US US12/388,092 patent/US7897433B2/en active Active
-
2010
- 2010-02-17 WO PCT/US2010/024462 patent/WO2010096473A2/en not_active Ceased
- 2010-02-17 KR KR1020117021554A patent/KR101308100B1/ko active Active
- 2010-02-17 SG SG2011053386A patent/SG173447A1/en unknown
- 2010-02-17 JP JP2011550323A patent/JP5576885B2/ja active Active
- 2010-02-17 EP EP10704716.9A patent/EP2399284B1/en not_active Not-in-force
- 2010-02-17 CN CN201080008014.8A patent/CN102318051B/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN102318051A (zh) | 2012-01-11 |
| JP5576885B2 (ja) | 2014-08-20 |
| WO2010096473A3 (en) | 2011-02-03 |
| KR101308100B1 (ko) | 2013-09-12 |
| US20100207281A1 (en) | 2010-08-19 |
| EP2399284B1 (en) | 2015-06-17 |
| US7897433B2 (en) | 2011-03-01 |
| EP2399284A2 (en) | 2011-12-28 |
| CN102318051B (zh) | 2014-02-26 |
| KR20110126707A (ko) | 2011-11-23 |
| WO2010096473A2 (en) | 2010-08-26 |
| JP2012518282A (ja) | 2012-08-09 |
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