SG166717A1 - A method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of sige deposited on the front side - Google Patents

A method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of sige deposited on the front side

Info

Publication number
SG166717A1
SG166717A1 SG201001622-8A SG2010016228A SG166717A1 SG 166717 A1 SG166717 A1 SG 166717A1 SG 2010016228 A SG2010016228 A SG 2010016228A SG 166717 A1 SG166717 A1 SG 166717A1
Authority
SG
Singapore
Prior art keywords
single crystal
crystal substrate
silicon single
back side
layer
Prior art date
Application number
SG201001622-8A
Other languages
English (en)
Inventor
Dr Peter Storck
Thomas Buschhardt
Original Assignee
Siltronic Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic Ag filed Critical Siltronic Ag
Publication of SG166717A1 publication Critical patent/SG166717A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/933Germanium or silicon or Ge-Si on III-V

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
SG201001622-8A 2009-05-13 2010-03-08 A method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of sige deposited on the front side SG166717A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP09006476.7A EP2251897B1 (de) 2009-05-13 2009-05-13 Verfahren zur Herstellung eines Wafers aus einem Siliziumeinkristallsubstrat mit einer Vorder- und einer Rückseite und einer auf der Vorderseite gelagerten SiGe-Schicht

Publications (1)

Publication Number Publication Date
SG166717A1 true SG166717A1 (en) 2010-12-29

Family

ID=41055122

Family Applications (1)

Application Number Title Priority Date Filing Date
SG201001622-8A SG166717A1 (en) 2009-05-13 2010-03-08 A method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of sige deposited on the front side

Country Status (7)

Country Link
US (1) US8093143B2 (de)
EP (1) EP2251897B1 (de)
JP (1) JP5159824B2 (de)
KR (1) KR101122387B1 (de)
CN (1) CN101887848B (de)
SG (1) SG166717A1 (de)
TW (1) TWI411032B (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8115195B2 (en) * 2008-03-20 2012-02-14 Siltronic Ag Semiconductor wafer with a heteroepitaxial layer and a method for producing the wafer
IT1406644B1 (it) 2010-04-29 2014-03-07 Abbondanza Substrato (fetta) di materiale semiconduttore con sovrastanti strati eteroepitassiali assumenti una struttura sandwich, idoneo per la fabbricazione di componenti elettronici ibridi.
WO2012147605A1 (ja) * 2011-04-26 2012-11-01 旭硝子株式会社 非酸化物単結晶基板の研磨方法
JP6051524B2 (ja) * 2012-01-18 2016-12-27 セイコーエプソン株式会社 半導体基板及び半導体基板の製造方法
CN103523738B (zh) 2012-07-06 2016-07-06 无锡华润上华半导体有限公司 微机电系统薄片及其制备方法
CN103346078A (zh) * 2013-06-26 2013-10-09 上海宏力半导体制造有限公司 化学机械研磨的方法
US9721792B2 (en) 2013-09-16 2017-08-01 Applied Materials, Inc. Method of forming strain-relaxed buffer layers
US9520696B2 (en) 2014-03-04 2016-12-13 Princeton Optronics Inc. Processes for making reliable VCSEL devices and VCSEL arrays
US9881788B2 (en) * 2014-05-22 2018-01-30 Lam Research Corporation Back side deposition apparatus and applications
CN104157577B (zh) * 2014-08-26 2016-11-02 上海华虹宏力半导体制造有限公司 半导体器件的形成方法
US10818611B2 (en) 2015-07-01 2020-10-27 Ii-Vi Delaware, Inc. Stress relief in semiconductor wafers
FR3064398B1 (fr) * 2017-03-21 2019-06-07 Soitec Structure de type semi-conducteur sur isolant, notamment pour un capteur d'image de type face avant, et procede de fabrication d'une telle structure
US10851457B2 (en) 2017-08-31 2020-12-01 Lam Research Corporation PECVD deposition system for deposition on selective side of the substrate
US10205303B1 (en) 2017-10-18 2019-02-12 Lumentum Operations Llc Vertical-cavity surface-emitting laser thin wafer bowing control
KR102594342B1 (ko) * 2018-03-12 2023-10-26 도쿄엘렉트론가부시키가이샤 기판의 휨 수정 방법, 컴퓨터 기억 매체 및 기판 휨 수정 장치
CN110852021B (zh) * 2018-07-26 2024-02-06 上海新昇半导体科技有限公司 基于模拟方式获得外延平坦度的方法
KR20230037057A (ko) 2019-08-16 2023-03-15 램 리써치 코포레이션 웨이퍼 내에서 차동 보우를 보상하기 위한 공간적으로 튜닝 가능한 증착
EP3965141A1 (de) 2020-09-04 2022-03-09 Siltronic AG Verfahren zur abscheidung einer silizium-germanium-schicht auf einem substrat
CN113948390B (zh) * 2021-08-30 2024-03-19 西安电子科技大学 一种基于衬底背面外延层的硅基AlGaN/GaN HEMT及制备方法
CN113964034B (zh) * 2021-08-30 2024-03-19 西安电子科技大学 一种基于衬底背面GeSnSi外延层的硅基AlGaN/GaN HEMT及制备方法
CN113948389B (zh) * 2021-08-30 2023-03-14 西安电子科技大学 一种基于衬底背面SiSn外延层的硅基AlGaN/GaN HEMT及制备方法
CN113948391B (zh) * 2021-08-30 2023-11-21 西安电子科技大学 一种硅基AlGaN/GaN HEMT器件及制备方法
CN114242766A (zh) * 2021-11-08 2022-03-25 上海新硅聚合半导体有限公司 一种复合衬底结构及其形貌改善方法
CN116666500B (zh) * 2023-07-24 2023-11-03 上海铭锟半导体有限公司 锗光电探测器及通过热失配应力提高其长波响应的方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4925809A (en) * 1987-05-23 1990-05-15 Osaka Titanium Co., Ltd. Semiconductor wafer and epitaxial growth on the semiconductor wafer with autodoping control and manufacturing method therefor
EP0798765A3 (de) * 1996-03-28 1998-08-05 Shin-Etsu Handotai Company Limited Verfahren zur Herstellung einer Halbleiterscheibe mit einer Schicht zur Verhinderung der Verdampfung von Dotierstoffen auf der einen Oberfläche und einer epitaktischen Schicht auf der anderen Oberfläche
JP4207548B2 (ja) * 2002-11-28 2009-01-14 株式会社Sumco 半導体基板の製造方法及び電界効果型トランジスタの製造方法並びに半導体基板及び電界効果型トランジスタ
US7198671B2 (en) 2001-07-11 2007-04-03 Matsushita Electric Industrial Co., Ltd. Layered substrates for epitaxial processing, and device
JP4378904B2 (ja) * 2001-09-28 2009-12-09 株式会社Sumco 半導体基板の製造方法及び電界効果型トランジスタの製造方法
JP4325139B2 (ja) * 2001-11-07 2009-09-02 株式会社Sumco 半導体基板の製造方法及び電界効果型トランジスタの製造方法
EP1315199A1 (de) * 2001-11-22 2003-05-28 ETH Zürich Herstellung von Silizium-Germanium-Strukturen hoher Beweglichtkeit durch Niederenergyplasma unterstützte chemische Dampfabscheidung
US7157119B2 (en) * 2002-06-25 2007-01-02 Ppg Industries Ohio, Inc. Method and compositions for applying multiple overlying organic pigmented decorations on ceramic substrates
SG114574A1 (en) * 2002-09-25 2005-09-28 Siltronic Singapore Pte Ltd Two layer lto backside seal for a wafer
JP4682508B2 (ja) * 2003-11-14 2011-05-11 信越半導体株式会社 シリコンエピタキシャルウェーハの製造方法
US7880278B2 (en) * 2006-05-16 2011-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit having stress tuning layer
US7608526B2 (en) * 2006-07-24 2009-10-27 Asm America, Inc. Strained layers within semiconductor buffer structures
FR2921515B1 (fr) 2007-09-25 2010-07-30 Commissariat Energie Atomique Procede de fabrication de structures semiconductrices utiles pour la realisation de substrats semiconducteur- sur-isolant, et ses applications.

Also Published As

Publication number Publication date
JP5159824B2 (ja) 2013-03-13
US8093143B2 (en) 2012-01-10
EP2251897B1 (de) 2016-01-06
TWI411032B (zh) 2013-10-01
EP2251897A1 (de) 2010-11-17
JP2010267969A (ja) 2010-11-25
TW201041029A (en) 2010-11-16
CN101887848B (zh) 2012-11-14
KR101122387B1 (ko) 2012-03-23
KR20100122873A (ko) 2010-11-23
CN101887848A (zh) 2010-11-17
US20100291761A1 (en) 2010-11-18

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