SG11201401988PA - Process for fabricating a heterostructure limiting the formation of defects - Google Patents
Process for fabricating a heterostructure limiting the formation of defectsInfo
- Publication number
- SG11201401988PA SG11201401988PA SG11201401988PA SG11201401988PA SG11201401988PA SG 11201401988P A SG11201401988P A SG 11201401988PA SG 11201401988P A SG11201401988P A SG 11201401988PA SG 11201401988P A SG11201401988P A SG 11201401988PA SG 11201401988P A SG11201401988P A SG 11201401988PA
- Authority
- SG
- Singapore
- Prior art keywords
- heterostructure
- fabricating
- defects
- formation
- limiting
- Prior art date
Links
- 230000015572 biosynthetic process Effects 0.000 title 1
- 230000007547 defect Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1161000A FR2983342B1 (fr) | 2011-11-30 | 2011-11-30 | Procede de fabrication d'une heterostructure limitant la formation de defauts et heterostructure ainsi obtenue |
PCT/IB2012/002482 WO2013080010A1 (en) | 2011-11-30 | 2012-11-21 | Process for fabricating a heterostructure limiting the formation of defects |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201401988PA true SG11201401988PA (en) | 2014-10-30 |
Family
ID=47603837
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201401988PA SG11201401988PA (en) | 2011-11-30 | 2012-11-21 | Process for fabricating a heterostructure limiting the formation of defects |
Country Status (6)
Country | Link |
---|---|
US (1) | US9330958B2 (zh) |
KR (1) | KR101972926B1 (zh) |
CN (1) | CN103946970B (zh) |
FR (1) | FR2983342B1 (zh) |
SG (1) | SG11201401988PA (zh) |
WO (1) | WO2013080010A1 (zh) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2995444B1 (fr) * | 2012-09-10 | 2016-11-25 | Soitec Silicon On Insulator | Procede de detachement d'une couche |
JP6061251B2 (ja) * | 2013-07-05 | 2017-01-18 | 株式会社豊田自動織機 | 半導体基板の製造方法 |
EP3217421A1 (de) | 2014-06-24 | 2017-09-13 | EV Group E. Thallner GmbH | Vorrichtung zur oberflächenbehandlung von substraten |
CN105845548A (zh) * | 2015-01-16 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | 一种硅衬底及其制造方法 |
JP2016171307A (ja) * | 2015-03-10 | 2016-09-23 | 株式会社デンソー | 基板接合方法 |
CN105140107B (zh) * | 2015-08-25 | 2019-03-29 | 上海新傲科技股份有限公司 | 带有电荷陷阱和绝缘埋层衬底的制备方法 |
CN107346746B (zh) * | 2016-05-05 | 2020-09-08 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法和电子装置 |
FR3051979B1 (fr) * | 2016-05-25 | 2018-05-18 | Soitec | Procede de guerison de defauts dans une couche obtenue par implantation puis detachement d'un substrat |
FR3051968B1 (fr) * | 2016-05-25 | 2018-06-01 | Soitec | Procede de fabrication d'un substrat semi-conducteur a haute resistivite |
CN107958839B (zh) * | 2016-10-18 | 2020-09-29 | 上海新昇半导体科技有限公司 | 晶圆键合方法及其键合装置 |
US10971365B2 (en) * | 2017-02-21 | 2021-04-06 | Ev Group E. Thallner Gmbh | Method and device for bonding substrates |
FR3076292B1 (fr) * | 2017-12-28 | 2020-01-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de transfert d'une couche utile sur un substrat support |
FR3079346B1 (fr) * | 2018-03-26 | 2020-05-29 | Soitec | Procede de fabrication d'un substrat donneur pour le transfert d'une couche piezoelectrique, et procede de transfert d'une telle couche piezoelectrique |
FR3079659B1 (fr) * | 2018-03-29 | 2020-03-13 | Soitec | Procede de fabrication d'un substrat donneur pour la realisation d'une structure integree en trois dimensions et procede de fabrication d'une telle structure integree |
FR3091000B1 (fr) * | 2018-12-24 | 2020-12-04 | Soitec Silicon On Insulator | Procede de fabrication d’un substrat pour un capteur d’image de type face avant |
CN113629182A (zh) * | 2020-05-08 | 2021-11-09 | 济南晶正电子科技有限公司 | 一种tc-saw复合衬底及其制备方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2810448B1 (fr) * | 2000-06-16 | 2003-09-19 | Soitec Silicon On Insulator | Procede de fabrication de substrats et substrats obtenus par ce procede |
JP5051949B2 (ja) * | 2001-05-31 | 2012-10-17 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
FR2835095B1 (fr) * | 2002-01-22 | 2005-03-18 | Procede de preparation d'ensembles a semi-conducteurs separables, notamment pour former des substrats pour l'electronique, l'optoelectrique et l'optique | |
FR2838865B1 (fr) * | 2002-04-23 | 2005-10-14 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee |
JP2004259970A (ja) * | 2003-02-26 | 2004-09-16 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法及びsoiウエーハ |
US20050116290A1 (en) * | 2003-12-02 | 2005-06-02 | De Souza Joel P. | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers |
WO2006037783A1 (fr) * | 2004-10-04 | 2006-04-13 | S.O.I.Tec Silicon On Insulator Technologies | Procédé de transfert d'une couche mince comprenant une perturbation controlée d'une structure cristalline |
FR2890489B1 (fr) | 2005-09-08 | 2008-03-07 | Soitec Silicon On Insulator | Procede de fabrication d'une heterostructure de type semi-conducteur sur isolant |
JP5096780B2 (ja) * | 2006-04-27 | 2012-12-12 | 信越半導体株式会社 | Soiウエーハの製造方法 |
JP2008004900A (ja) * | 2006-06-26 | 2008-01-10 | Sumco Corp | 貼り合わせウェーハの製造方法 |
DE602006017906D1 (de) * | 2006-12-26 | 2010-12-09 | Soitec Silicon On Insulator | Verfahren zum herstellen einer halbleiter-auf-isolator-struktur |
CN101620983B (zh) * | 2008-06-20 | 2011-05-25 | 李天锡 | 薄膜制造方法 |
FR2933233B1 (fr) * | 2008-06-30 | 2010-11-26 | Soitec Silicon On Insulator | Substrat de haute resistivite bon marche et procede de fabrication associe |
-
2011
- 2011-11-30 FR FR1161000A patent/FR2983342B1/fr active Active
-
2012
- 2012-11-21 US US14/360,124 patent/US9330958B2/en active Active
- 2012-11-21 CN CN201280057831.1A patent/CN103946970B/zh active Active
- 2012-11-21 KR KR1020147016394A patent/KR101972926B1/ko active IP Right Grant
- 2012-11-21 WO PCT/IB2012/002482 patent/WO2013080010A1/en active Application Filing
- 2012-11-21 SG SG11201401988PA patent/SG11201401988PA/en unknown
Also Published As
Publication number | Publication date |
---|---|
KR20140104436A (ko) | 2014-08-28 |
CN103946970A (zh) | 2014-07-23 |
US9330958B2 (en) | 2016-05-03 |
CN103946970B (zh) | 2017-07-25 |
US20150132923A1 (en) | 2015-05-14 |
FR2983342A1 (fr) | 2013-05-31 |
FR2983342B1 (fr) | 2016-05-20 |
KR101972926B1 (ko) | 2019-04-26 |
WO2013080010A1 (en) | 2013-06-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG11201401988PA (en) | Process for fabricating a heterostructure limiting the formation of defects | |
EP2699534A4 (en) | PROCESS FOR PRODUCING TRANS-1233zd | |
HK1199882A1 (zh) | 用於製備雌四醇的方法 | |
ZA201404210B (en) | Organotemplate-free synthetic process for the production of a zeolitic material of the cha-type structure | |
HRP20181747T1 (hr) | Postupak za selektivnu proizvodnju n-metil-para-anisidina | |
PL2675539T3 (pl) | Sposób wytwarzania poli(kwasu hydroksykarboksylowego) | |
EP2679575A4 (en) | PROCESS FOR THE PREPARATION OF CARBONYL COMPOUNDS | |
PT2687791T (pt) | Método para a produção de um elemento refletor | |
IL226677A (en) | Beta-amyloid production compounds | |
EP2682217A4 (en) | METHOD FOR MANUFACTURING SLIDING ELEMENT | |
IL232838A0 (en) | Process for the production of triazinon-benzoxazinones | |
EP2708529A4 (en) | PROCESS FOR PRODUCING PARTICLES | |
PL2744772T3 (pl) | Sposób wytwarzania sewofluranu | |
GB2488894B (en) | Process for producing V-Coelenterazine compounds | |
EP2740719A4 (en) | PROCESS FOR THE PREPARATION OF A-FLUOROALDEHYDE | |
SG10201602816XA (en) | B2f4 manufacturing process | |
PL2663546T3 (pl) | Sposób wytwarzania związków kwasów nitrylo-tłuszczowych | |
PL2681199T3 (pl) | Sposób wytwarzania (-)-hupercyny A | |
PL2476684T3 (pl) | Sposób wytwarzania alkilofosforanów | |
IL232840A (en) | Process for the production of aryloxyacetamides | |
IL228900A0 (en) | A process for the preparation of hexamethylenediamine | |
EP2752402A4 (en) | METHOD OF PREPARING A 2-ALKENYLAMINE COMPOUND | |
IL230159A0 (en) | Method for the production of 2-amino-5-cyano-n,3-dimethylbenzamide | |
SG11201403392UA (en) | Process for the production of alcohols | |
SG11201403380UA (en) | Process for the production of alcohols |