SG10201507190YA - Sacrificial pre-metal dielectric for self-aligned contact scheme - Google Patents
Sacrificial pre-metal dielectric for self-aligned contact schemeInfo
- Publication number
- SG10201507190YA SG10201507190YA SG10201507190YA SG10201507190YA SG10201507190YA SG 10201507190Y A SG10201507190Y A SG 10201507190YA SG 10201507190Y A SG10201507190Y A SG 10201507190YA SG 10201507190Y A SG10201507190Y A SG 10201507190YA SG 10201507190Y A SG10201507190Y A SG 10201507190YA
- Authority
- SG
- Singapore
- Prior art keywords
- self
- metal dielectric
- aligned contact
- contact scheme
- sacrificial pre
- Prior art date
Links
- 239000002184 metal Substances 0.000 title 1
Classifications
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7845—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being a conductive material, e.g. silicided S/D or Gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Ceramic Engineering (AREA)
- Plasma & Fusion (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/479,733 US9190489B1 (en) | 2014-09-08 | 2014-09-08 | Sacrificial pre-metal dielectric for self-aligned contact scheme |
Publications (1)
Publication Number | Publication Date |
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SG10201507190YA true SG10201507190YA (en) | 2016-04-28 |
Family
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Family Applications (1)
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SG10201507190YA SG10201507190YA (en) | 2014-09-08 | 2015-09-08 | Sacrificial pre-metal dielectric for self-aligned contact scheme |
Country Status (6)
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US (2) | US9190489B1 (ko) |
JP (1) | JP2016058727A (ko) |
KR (2) | KR102345587B1 (ko) |
CN (1) | CN105405760B (ko) |
SG (1) | SG10201507190YA (ko) |
TW (1) | TW201622008A (ko) |
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US9502263B2 (en) * | 2014-12-15 | 2016-11-22 | Applied Materials, Inc. | UV assisted CVD AlN film for BEOL etch stop application |
US10388515B2 (en) | 2015-11-16 | 2019-08-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Treatment to control deposition rate |
US9887130B2 (en) * | 2016-01-29 | 2018-02-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | FinFET device and method of forming the same |
JP6625200B2 (ja) * | 2016-03-24 | 2019-12-25 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
US10651080B2 (en) | 2016-04-26 | 2020-05-12 | Lam Research Corporation | Oxidizing treatment of aluminum nitride films in semiconductor device manufacturing |
US10246774B2 (en) | 2016-08-12 | 2019-04-02 | Lam Research Corporation | Additive for ALD deposition profile tuning in gap features |
US10049869B2 (en) * | 2016-09-30 | 2018-08-14 | Lam Research Corporation | Composite dielectric interface layers for interconnect structures |
US9859153B1 (en) | 2016-11-14 | 2018-01-02 | Lam Research Corporation | Deposition of aluminum oxide etch stop layers |
US9905472B1 (en) * | 2017-02-23 | 2018-02-27 | Globalfoundries Inc. | Silicon nitride CESL removal without gate cap height loss and resulting device |
US10153198B2 (en) * | 2017-04-07 | 2018-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Low-resistance contact plugs and method forming same |
US20180350607A1 (en) * | 2017-06-01 | 2018-12-06 | Globalfoundries Inc. | Semiconductor structure |
US10388562B2 (en) * | 2017-08-16 | 2019-08-20 | Globalfoundries Inc. | Composite contact etch stop layer |
US10763104B2 (en) * | 2017-09-28 | 2020-09-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming differential etch stop layer using directional plasma to activate surface on device structure |
KR102557549B1 (ko) | 2018-04-26 | 2023-07-19 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
KR102521890B1 (ko) * | 2018-07-17 | 2023-04-14 | 삼성전자주식회사 | 반도체 장치 |
US10943818B2 (en) | 2018-10-31 | 2021-03-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
CN111668094A (zh) * | 2019-03-07 | 2020-09-15 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其制备方法 |
US11069680B2 (en) | 2019-03-28 | 2021-07-20 | International Business Machines Corporation | FinFET-based integrated circuits with reduced parasitic capacitance |
WO2024054413A1 (en) * | 2022-09-06 | 2024-03-14 | Lam Research Corporation | Doped silicon or boron layer formation |
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KR100268443B1 (ko) * | 1998-08-29 | 2000-10-16 | 윤종용 | 반도체 장치의 자기 정렬 콘택 형성 방법 |
JP2006196895A (ja) * | 2005-01-10 | 2006-07-27 | Samsung Electronics Co Ltd | 自己整列コンタクトの形成方法 |
US20070281405A1 (en) * | 2006-06-02 | 2007-12-06 | International Business Machines Corporation | Methods of stressing transistor channel with replaced gate and related structures |
US7445943B2 (en) * | 2006-10-19 | 2008-11-04 | Everspin Technologies, Inc. | Magnetic tunnel junction memory and method with etch-stop layer |
US10037905B2 (en) | 2009-11-12 | 2018-07-31 | Novellus Systems, Inc. | UV and reducing treatment for K recovery and surface clean in semiconductor processing |
CN101577244B (zh) * | 2008-05-05 | 2011-11-30 | 中芯国际集成电路制造(北京)有限公司 | 层间介质层的平坦化方法及接触孔的形成方法 |
KR101000308B1 (ko) * | 2008-07-24 | 2010-12-13 | 주식회사 아토 | 고유전막 형성 방법 |
CN101651140B (zh) * | 2008-08-12 | 2011-05-11 | 宜扬科技股份有限公司 | 一种具应力区的金属氧化半导体结构 |
US8268722B2 (en) | 2009-06-03 | 2012-09-18 | Novellus Systems, Inc. | Interfacial capping layers for interconnects |
US9611544B2 (en) * | 2010-04-15 | 2017-04-04 | Novellus Systems, Inc. | Plasma activated conformal dielectric film deposition |
KR101692309B1 (ko) * | 2010-08-25 | 2017-01-04 | 삼성전자 주식회사 | 반도체 장치의 제조방법 |
US8084311B1 (en) * | 2010-11-17 | 2011-12-27 | International Business Machines Corporation | Method of forming replacement metal gate with borderless contact and structure thereof |
CN102623405B (zh) * | 2011-01-30 | 2014-08-20 | 中国科学院微电子研究所 | 一种形成半导体结构的方法 |
US8334198B2 (en) * | 2011-04-12 | 2012-12-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating a plurality of gate structures |
US8722500B2 (en) * | 2011-09-20 | 2014-05-13 | GlobalFoundries, Inc. | Methods for fabricating integrated circuits having gate to active and gate to gate interconnects |
CN103107091B (zh) * | 2011-11-15 | 2016-06-22 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
US9214334B2 (en) | 2014-02-18 | 2015-12-15 | Lam Research Corporation | High growth rate process for conformal aluminum nitride |
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2014
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2015
- 2015-08-28 TW TW104128252A patent/TW201622008A/zh unknown
- 2015-09-01 JP JP2015171774A patent/JP2016058727A/ja active Pending
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2021
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US20160071953A1 (en) | 2016-03-10 |
CN105405760B (zh) | 2019-02-19 |
TW201622008A (zh) | 2016-06-16 |
KR102345587B1 (ko) | 2021-12-30 |
US9190489B1 (en) | 2015-11-17 |
KR20220002214A (ko) | 2022-01-06 |
CN105405760A (zh) | 2016-03-16 |
JP2016058727A (ja) | 2016-04-21 |
KR20160030048A (ko) | 2016-03-16 |
US9379210B2 (en) | 2016-06-28 |
KR102501364B1 (ko) | 2023-02-17 |
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