SG10201504767PA - Process for manufacturing semiconductor package having hollow chamber - Google Patents

Process for manufacturing semiconductor package having hollow chamber

Info

Publication number
SG10201504767PA
SG10201504767PA SG10201504767PA SG10201504767PA SG10201504767PA SG 10201504767P A SG10201504767P A SG 10201504767PA SG 10201504767P A SG10201504767P A SG 10201504767PA SG 10201504767P A SG10201504767P A SG 10201504767PA SG 10201504767P A SG10201504767P A SG 10201504767PA
Authority
SG
Singapore
Prior art keywords
semiconductor package
hollow chamber
manufacturing semiconductor
manufacturing
hollow
Prior art date
Application number
SG10201504767PA
Other languages
English (en)
Inventor
Shih Cheng-Hung
Hsieh Yung-Wei
Lin Shu-Chen
Ho Fu-Yen
Chen Yen-Ting
Original Assignee
Chipbond Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipbond Technology Corp filed Critical Chipbond Technology Corp
Publication of SG10201504767PA publication Critical patent/SG10201504767PA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00269—Bonding of solid lids or wafers to the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/01—Packaging MEMS
    • B81C2203/0172—Seals
    • B81C2203/019—Seals characterised by the material or arrangement of seals between parts

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
SG10201504767PA 2015-05-01 2015-06-17 Process for manufacturing semiconductor package having hollow chamber SG10201504767PA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW104114011A TWI544580B (zh) 2015-05-01 2015-05-01 具中空腔室之半導體封裝製程

Publications (1)

Publication Number Publication Date
SG10201504767PA true SG10201504767PA (en) 2016-12-29

Family

ID=57183661

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201504767PA SG10201504767PA (en) 2015-05-01 2015-06-17 Process for manufacturing semiconductor package having hollow chamber

Country Status (6)

Country Link
US (1) US20160318756A1 (zh)
JP (1) JP6110437B2 (zh)
KR (1) KR101731942B1 (zh)
CN (1) CN106098568A (zh)
SG (1) SG10201504767PA (zh)
TW (1) TWI544580B (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6469327B1 (ja) * 2017-06-08 2019-02-13 北陸電気工業株式会社 センサデバイス及びその製造方法
DE102017125140B4 (de) * 2017-10-26 2021-06-10 Infineon Technologies Ag Verfahren zum Herstellen eines hermetisch abgedichteten Gehäuses mit einem Halbleiterbauteil
DE102018102144A1 (de) * 2018-01-31 2019-08-01 Tdk Electronics Ag Elektronisches Bauelement
JP7174242B2 (ja) * 2018-06-15 2022-11-17 日亜化学工業株式会社 半導体装置の製造方法
US10811581B2 (en) * 2018-06-15 2020-10-20 Nichia Corporation Method of manufacturing semiconductor device
US20210276859A1 (en) * 2018-09-26 2021-09-09 Ignite, Inc. A MEMS Package
WO2020185021A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 패키징 기판 및 이를 포함하는 반도체 장치
KR102396184B1 (ko) 2019-03-12 2022-05-10 앱솔릭스 인코포레이티드 패키징 기판 및 이를 포함하는 반도체 장치
WO2020185020A1 (ko) 2019-03-12 2020-09-17 에스케이씨 주식회사 유리를 포함하는 기판의 적재 카세트 및 이를 적용한 기판의 적재방법
WO2020204473A1 (ko) 2019-03-29 2020-10-08 에스케이씨 주식회사 반도체용 패키징 유리기판, 반도체용 패키징 기판 및 반도체 장치
CN113366633B (zh) 2019-08-23 2022-07-12 爱玻索立克公司 封装基板及包括其的半导体装置
JP7318572B2 (ja) * 2020-03-17 2023-08-01 三菱電機株式会社 半導体装置及び半導体装置の製造方法
KR20220081445A (ko) 2020-12-08 2022-06-16 삼성전자주식회사 PoP 구조의 반도체 패키지 및 그 제조방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6479320B1 (en) * 2000-02-02 2002-11-12 Raytheon Company Vacuum package fabrication of microelectromechanical system devices with integrated circuit components
US6661082B1 (en) * 2000-07-19 2003-12-09 Fairchild Semiconductor Corporation Flip chip substrate design
JP2002299484A (ja) * 2001-03-29 2002-10-11 Matsushita Electric Ind Co Ltd 電子部品
JP2004111571A (ja) * 2002-09-17 2004-04-08 Kyocera Corp 半導体素子収納用パッケージおよび半導体装置
JP2006228837A (ja) * 2005-02-15 2006-08-31 Sharp Corp 半導体装置及びその製造方法
US20070170599A1 (en) * 2006-01-24 2007-07-26 Masazumi Amagai Flip-attached and underfilled stacked semiconductor devices
JP2008085108A (ja) 2006-09-28 2008-04-10 Kyocera Corp 接合構造体および電子装置
JP4274264B2 (ja) * 2007-04-06 2009-06-03 パナソニック株式会社 モジュールの製造方法
JP2009038286A (ja) * 2007-08-03 2009-02-19 Olympus Corp 封止構造体
JP5645047B2 (ja) * 2008-09-29 2014-12-24 日立化成株式会社 半導体素子搭載用パッケージ基板とその製法及び半導体パッケージ
JP5537119B2 (ja) 2009-10-28 2014-07-02 京セラ株式会社 蓋体並びに蓋体の製造方法および電子装置の製造方法
US8393526B2 (en) * 2010-10-21 2013-03-12 Raytheon Company System and method for packaging electronic devices

Also Published As

Publication number Publication date
KR101731942B1 (ko) 2017-05-02
US20160318756A1 (en) 2016-11-03
JP2016213426A (ja) 2016-12-15
TWI544580B (zh) 2016-08-01
CN106098568A (zh) 2016-11-09
JP6110437B2 (ja) 2017-04-05
TW201640622A (zh) 2016-11-16
KR20160130134A (ko) 2016-11-10

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