SG101487A1 - A method and apparatus for affecting subsequent instruction processing in a data processor - Google Patents

A method and apparatus for affecting subsequent instruction processing in a data processor

Info

Publication number
SG101487A1
SG101487A1 SG200106112A SG200106112A SG101487A1 SG 101487 A1 SG101487 A1 SG 101487A1 SG 200106112 A SG200106112 A SG 200106112A SG 200106112 A SG200106112 A SG 200106112A SG 101487 A1 SG101487 A1 SG 101487A1
Authority
SG
Singapore
Prior art keywords
data processor
instruction processing
subsequent instruction
affecting subsequent
affecting
Prior art date
Application number
SG200106112A
Other languages
English (en)
Inventor
C Moyer William
W Scott Jeffrey
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of SG101487A1 publication Critical patent/SG101487A1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094Condition code generation, e.g. Carry, Zero flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30079Pipeline control instructions, e.g. multicycle NOP
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087Synchronisation or serialisation instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
SG200106112A 1997-11-03 1998-10-30 A method and apparatus for affecting subsequent instruction processing in a data processor SG101487A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/963,321 US6000029A (en) 1997-11-03 1997-11-03 Method and apparatus for affecting subsequent instruction processing in a data processor

Publications (1)

Publication Number Publication Date
SG101487A1 true SG101487A1 (en) 2004-01-30

Family

ID=25507071

Family Applications (2)

Application Number Title Priority Date Filing Date
SG200106112A SG101487A1 (en) 1997-11-03 1998-10-30 A method and apparatus for affecting subsequent instruction processing in a data processor
SG1998004357A SG71861A1 (en) 1997-11-03 1998-10-30 A method and apparatus for affecting subsequent instruction processing in a data processor

Family Applications After (1)

Application Number Title Priority Date Filing Date
SG1998004357A SG71861A1 (en) 1997-11-03 1998-10-30 A method and apparatus for affecting subsequent instruction processing in a data processor

Country Status (9)

Country Link
US (2) US6000029A (de)
EP (1) EP0913767B1 (de)
JP (2) JP4883824B2 (de)
KR (1) KR100588790B1 (de)
CN (1) CN1098487C (de)
DE (1) DE69810064T2 (de)
HK (1) HK1020218A1 (de)
SG (2) SG101487A1 (de)
TW (1) TW494363B (de)

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US20030154347A1 (en) * 2002-02-12 2003-08-14 Wei Ma Methods and apparatus for reducing processor power consumption
US7392400B2 (en) 2003-04-18 2008-06-24 Via Technologies, Inc. Microprocessor apparatus and method for optimizing block cipher cryptographic functions
US7532722B2 (en) 2003-04-18 2009-05-12 Ip-First, Llc Apparatus and method for performing transparent block cipher cryptographic functions
US7925891B2 (en) 2003-04-18 2011-04-12 Via Technologies, Inc. Apparatus and method for employing cryptographic functions to generate a message digest
US7502943B2 (en) 2003-04-18 2009-03-10 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic block cipher round results
US7519833B2 (en) 2003-04-18 2009-04-14 Via Technologies, Inc. Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine
US7900055B2 (en) 2003-04-18 2011-03-01 Via Technologies, Inc. Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
US7536560B2 (en) 2003-04-18 2009-05-19 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic key size
US7321910B2 (en) 2003-04-18 2008-01-22 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7529367B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent cipher feedback mode cryptographic functions
US7539876B2 (en) 2003-04-18 2009-05-26 Via Technologies, Inc. Apparatus and method for generating a cryptographic key schedule in a microprocessor
US7844053B2 (en) 2003-04-18 2010-11-30 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7529368B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent output feedback mode cryptographic functions
US7542566B2 (en) 2003-04-18 2009-06-02 Ip-First, Llc Apparatus and method for performing transparent cipher block chaining mode cryptographic functions
CN100495324C (zh) * 2006-07-27 2009-06-03 中国科学院计算技术研究所 复杂指令集体系结构中的深度优先异常处理方法
US9772854B2 (en) 2012-06-15 2017-09-26 International Business Machines Corporation Selectively controlling instruction execution in transactional processing
US10437602B2 (en) 2012-06-15 2019-10-08 International Business Machines Corporation Program interruption filtering in transactional execution
US9367323B2 (en) 2012-06-15 2016-06-14 International Business Machines Corporation Processor assist facility
US9436477B2 (en) 2012-06-15 2016-09-06 International Business Machines Corporation Transaction abort instruction
US9336046B2 (en) 2012-06-15 2016-05-10 International Business Machines Corporation Transaction abort processing
US9317460B2 (en) 2012-06-15 2016-04-19 International Business Machines Corporation Program event recording within a transactional environment
US20130339680A1 (en) 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
US9442737B2 (en) 2012-06-15 2016-09-13 International Business Machines Corporation Restricting processing within a processor to facilitate transaction completion
US9740549B2 (en) 2012-06-15 2017-08-22 International Business Machines Corporation Facilitating transaction completion subsequent to repeated aborts of the transaction
US8966324B2 (en) 2012-06-15 2015-02-24 International Business Machines Corporation Transactional execution branch indications
US9384004B2 (en) 2012-06-15 2016-07-05 International Business Machines Corporation Randomized testing within transactional execution
US8880959B2 (en) 2012-06-15 2014-11-04 International Business Machines Corporation Transaction diagnostic block
US8682877B2 (en) 2012-06-15 2014-03-25 International Business Machines Corporation Constrained transaction execution
US8688661B2 (en) 2012-06-15 2014-04-01 International Business Machines Corporation Transactional processing
US9361115B2 (en) 2012-06-15 2016-06-07 International Business Machines Corporation Saving/restoring selected registers in transactional processing
US9348642B2 (en) 2012-06-15 2016-05-24 International Business Machines Corporation Transaction begin/end instructions
US9448796B2 (en) 2012-06-15 2016-09-20 International Business Machines Corporation Restricted instructions in transactional execution
CN110535790B (zh) * 2019-08-23 2022-03-18 天津芯海创科技有限公司 基于semaphore的交换芯片异常报文处理方法
US20240004696A1 (en) * 2022-06-29 2024-01-04 Red Hat, Inc. Synchronizing concurrent tasks using interrupt deferral instructions

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Also Published As

Publication number Publication date
JP2009104675A (ja) 2009-05-14
DE69810064D1 (de) 2003-01-23
JP4750865B2 (ja) 2011-08-17
US6237089B1 (en) 2001-05-22
SG71861A1 (en) 2000-04-18
EP0913767B1 (de) 2002-12-11
HK1020218A1 (en) 2000-03-31
CN1216375A (zh) 1999-05-12
TW494363B (en) 2002-07-11
EP0913767A3 (de) 2000-01-26
JPH11219302A (ja) 1999-08-10
DE69810064T2 (de) 2003-04-17
CN1098487C (zh) 2003-01-08
KR100588790B1 (ko) 2006-10-04
JP4883824B2 (ja) 2012-02-22
KR19990044957A (ko) 1999-06-25
EP0913767A2 (de) 1999-05-06
US6000029A (en) 1999-12-07

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