SE457672B - System foer at oeverfoera bitseriella meddelanden mellan en centralenhet och ett direktminne - Google Patents

System foer at oeverfoera bitseriella meddelanden mellan en centralenhet och ett direktminne

Info

Publication number
SE457672B
SE457672B SE8402598A SE8402598A SE457672B SE 457672 B SE457672 B SE 457672B SE 8402598 A SE8402598 A SE 8402598A SE 8402598 A SE8402598 A SE 8402598A SE 457672 B SE457672 B SE 457672B
Authority
SE
Sweden
Prior art keywords
memory
message
address
shift register
data
Prior art date
Application number
SE8402598A
Other languages
English (en)
Swedish (sv)
Other versions
SE8402598L (sv
SE8402598D0 (sv
Inventor
R G Ott
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of SE8402598D0 publication Critical patent/SE8402598D0/xx
Publication of SE8402598L publication Critical patent/SE8402598L/
Publication of SE457672B publication Critical patent/SE457672B/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
SE8402598A 1983-05-16 1984-05-14 System foer at oeverfoera bitseriella meddelanden mellan en centralenhet och ett direktminne SE457672B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/495,115 US4692859A (en) 1983-05-16 1983-05-16 Multiple byte serial data transfer protocol

Publications (3)

Publication Number Publication Date
SE8402598D0 SE8402598D0 (sv) 1984-05-14
SE8402598L SE8402598L (sv) 1984-11-17
SE457672B true SE457672B (sv) 1989-01-16

Family

ID=23967316

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8402598A SE457672B (sv) 1983-05-16 1984-05-14 System foer at oeverfoera bitseriella meddelanden mellan en centralenhet och ett direktminne

Country Status (6)

Country Link
US (1) US4692859A (enExample)
DE (1) DE3418248A1 (enExample)
FR (1) FR2546320B1 (enExample)
GB (1) GB2141270B (enExample)
IT (1) IT1178474B (enExample)
SE (1) SE457672B (enExample)

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US5408616A (en) * 1992-03-04 1995-04-18 Rockwell International Corp. System for redirecting output to either return bus or next module line upon the detection of the presence or absence of next module using ground line
AU5987294A (en) * 1993-02-17 1994-09-14 3Com Corporation System for reading dynamically changing data
JP3353382B2 (ja) 1993-04-23 2002-12-03 ソニー株式会社 記録又は再生装置、及びメモリ制御装置
US5897652A (en) * 1993-04-23 1999-04-27 Sony Corporation Memory control device and address generating circuit
JP3353381B2 (ja) * 1993-04-23 2002-12-03 ソニー株式会社 記録再生装置
US5588120A (en) * 1994-10-03 1996-12-24 Sanyo Electric Co., Ltd. Communication control system for transmitting, from one data processing device to another, data of different formats along with an identification of the format and its corresponding DMA controller
JPH08161259A (ja) * 1994-11-30 1996-06-21 Mitsubishi Electric Corp 直列データ受信装置及び直列データ転送装置
US5870631A (en) * 1995-12-15 1999-02-09 International Business Machines Corporation System for operating system software providing input buffer for receiving variable-length bit stream with a header containing synchronization data recognized by universal serial controller
EP0825506B1 (en) 1996-08-20 2013-03-06 Invensys Systems, Inc. Methods and apparatus for remote process control
US6415338B1 (en) * 1998-02-11 2002-07-02 Globespan, Inc. System for writing a data value at a starting address to a number of consecutive locations equal to a segment length identifier
JP3663049B2 (ja) 1998-05-14 2005-06-22 三洋電機株式会社 表示駆動回路
US6691183B1 (en) 1998-05-20 2004-02-10 Invensys Systems, Inc. Second transfer logic causing a first transfer logic to check a data ready bit prior to each of multibit transfer of a continous transfer operation
US7096465B1 (en) 1999-05-17 2006-08-22 Invensys Systems, Inc. Process control configuration system with parameterized objects
US6754885B1 (en) 1999-05-17 2004-06-22 Invensys Systems, Inc. Methods and apparatus for controlling object appearance in a process control configuration system
US7272815B1 (en) 1999-05-17 2007-09-18 Invensys Systems, Inc. Methods and apparatus for control configuration with versioning, security, composite blocks, edit selection, object swapping, formulaic values and other aspects
AU5273100A (en) 1999-05-17 2000-12-05 Foxboro Company, The Methods and apparatus for control configuration with versioning, security, composite blocks, edit selection, object swapping, formulaic values and other aspects
US7089530B1 (en) 1999-05-17 2006-08-08 Invensys Systems, Inc. Process control configuration system with connection validation and configuration
US6501995B1 (en) 1999-06-30 2002-12-31 The Foxboro Company Process control system and method with improved distribution, installation and validation of components
US6788980B1 (en) 1999-06-11 2004-09-07 Invensys Systems, Inc. Methods and apparatus for control using control devices that provide a virtual machine environment and that communicate via an IP network
WO2001009690A1 (en) 1999-07-29 2001-02-08 The Foxboro Company Methods and apparatus for object-based process control
US6473660B1 (en) 1999-12-03 2002-10-29 The Foxboro Company Process control system and method with automatic fault avoidance
US6779128B1 (en) 2000-02-18 2004-08-17 Invensys Systems, Inc. Fault-tolerant data transfer
US20040002950A1 (en) * 2002-04-15 2004-01-01 Brennan Sean F. Methods and apparatus for process, factory-floor, environmental, computer aided manufacturing-based or other control system using hierarchically enumerated data set
US7761923B2 (en) * 2004-03-01 2010-07-20 Invensys Systems, Inc. Process control methods and apparatus for intrusion detection, protection and network hardening
WO2007123753A2 (en) 2006-03-30 2007-11-01 Invensys Systems, Inc. Digital data processing apparatus and methods for improving plant performance
CN102124432B (zh) 2008-06-20 2014-11-26 因文西斯系统公司 对用于过程控制的实际和仿真设施进行交互的系统和方法
US8463964B2 (en) 2009-05-29 2013-06-11 Invensys Systems, Inc. Methods and apparatus for control configuration with enhanced change-tracking
US8127060B2 (en) 2009-05-29 2012-02-28 Invensys Systems, Inc Methods and apparatus for control configuration with control objects that are fieldbus protocol-aware

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US4204250A (en) * 1977-08-04 1980-05-20 Honeywell Information Systems Inc. Range count and main memory address accounting system
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FR2445557B1 (fr) * 1978-12-29 1985-09-27 Cii Honeywell Bull Dispositif de transfert de donnees
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US4482951A (en) * 1981-11-12 1984-11-13 Hughes Aircraft Company Direct memory access method for use with a multiplexed data bus

Also Published As

Publication number Publication date
SE8402598L (sv) 1984-11-17
FR2546320A1 (fr) 1984-11-23
GB2141270A (en) 1984-12-12
SE8402598D0 (sv) 1984-05-14
IT8420666A1 (it) 1985-10-20
FR2546320B1 (fr) 1990-03-30
US4692859A (en) 1987-09-08
IT8420666A0 (it) 1984-04-20
DE3418248C2 (enExample) 1990-08-16
GB2141270B (en) 1987-08-12
GB8411758D0 (en) 1984-06-13
DE3418248A1 (de) 1984-11-22
IT1178474B (it) 1987-09-09

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