SE0103726D0 - Silicon-germanium mesa transistor - Google Patents

Silicon-germanium mesa transistor

Info

Publication number
SE0103726D0
SE0103726D0 SE0103726A SE0103726A SE0103726D0 SE 0103726 D0 SE0103726 D0 SE 0103726D0 SE 0103726 A SE0103726 A SE 0103726A SE 0103726 A SE0103726 A SE 0103726A SE 0103726 D0 SE0103726 D0 SE 0103726D0
Authority
SE
Sweden
Prior art keywords
type doped
silicon
region
subcollector
type
Prior art date
Application number
SE0103726A
Other languages
English (en)
Other versions
SE0103726L (sv
SE522891C2 (sv
Inventor
Hans Norstroem
Ted Johansson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE0103726A priority Critical patent/SE522891C2/sv
Publication of SE0103726D0 publication Critical patent/SE0103726D0/sv
Priority to TW090129304A priority patent/TW512441B/zh
Priority to PCT/SE2002/001875 priority patent/WO2003041152A1/en
Publication of SE0103726L publication Critical patent/SE0103726L/sv
Publication of SE522891C2 publication Critical patent/SE522891C2/sv
Priority to US10/828,712 priority patent/US7008851B2/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66242Heterojunction transistors [HBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/737Hetero-junction transistors
    • H01L29/7371Vertical transistors
    • H01L29/7378Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
SE0103726A 2001-11-09 2001-11-09 En kisel-germanium mesa transistor, en metod för dess framställning och en integrerad krets innefattande en sådan transistor SE522891C2 (sv)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SE0103726A SE522891C2 (sv) 2001-11-09 2001-11-09 En kisel-germanium mesa transistor, en metod för dess framställning och en integrerad krets innefattande en sådan transistor
TW090129304A TW512441B (en) 2001-11-09 2001-11-27 Silicon-germanium mesa transistor
PCT/SE2002/001875 WO2003041152A1 (en) 2001-11-09 2002-10-15 Silicon-germanium mesa transistor
US10/828,712 US7008851B2 (en) 2001-11-09 2004-04-21 Silicon-germanium mesa transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE0103726A SE522891C2 (sv) 2001-11-09 2001-11-09 En kisel-germanium mesa transistor, en metod för dess framställning och en integrerad krets innefattande en sådan transistor

Publications (3)

Publication Number Publication Date
SE0103726D0 true SE0103726D0 (sv) 2001-11-09
SE0103726L SE0103726L (sv) 2003-05-10
SE522891C2 SE522891C2 (sv) 2004-03-16

Family

ID=20285918

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0103726A SE522891C2 (sv) 2001-11-09 2001-11-09 En kisel-germanium mesa transistor, en metod för dess framställning och en integrerad krets innefattande en sådan transistor

Country Status (4)

Country Link
US (1) US7008851B2 (sv)
SE (1) SE522891C2 (sv)
TW (1) TW512441B (sv)
WO (1) WO2003041152A1 (sv)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7002221B2 (en) * 2003-08-29 2006-02-21 International Business Machines Corporation Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
US7550787B2 (en) 2005-05-31 2009-06-23 International Business Machines Corporation Varied impurity profile region formation for varying breakdown voltage of devices
TW200849556A (en) * 2006-06-14 2008-12-16 Nxp Bv Semiconductor device and method of manufacturing such a device
KR100839786B1 (ko) 2006-09-20 2008-06-19 전북대학교산학협력단 실리콘게르마늄 반도체 소자 구조 및 그 제조방법
EP2250665A1 (en) * 2008-02-28 2010-11-17 Nxp B.V. Semiconductor device and method of manufacture thereof
JP2010251368A (ja) * 2009-04-10 2010-11-04 Renesas Electronics Corp バイポーラトランジスタ及びその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4417916A1 (de) * 1994-05-24 1995-11-30 Telefunken Microelectron Verfahren zur Herstellung eines Bipolartransistors
DE19609933A1 (de) * 1996-03-14 1997-09-18 Daimler Benz Ag Verfahren zur Herstellung eines Heterobipolartransistors
SE512813C2 (sv) * 1997-05-23 2000-05-15 Ericsson Telefon Ab L M Förfarande för framställning av en integrerad krets innefattande en dislokationsfri kollektorplugg förbunden med en begravd kollektor i en halvledarkomponent, som är omgiven av en dislokationsfri trench samt integrerad krets framställd enligt förfarandet
CA2385031A1 (en) 1999-09-17 2001-03-22 Telefonaktiebolaget Lm Ericsson A self-aligned method for forming deep trenches in shallow trenches for isolation of semiconductor devices
US6251738B1 (en) * 2000-01-10 2001-06-26 International Business Machines Corporation Process for forming a silicon-germanium base of heterojunction bipolar transistor
US6346453B1 (en) * 2000-01-27 2002-02-12 Sige Microsystems Inc. Method of producing a SI-GE base heterojunction bipolar device
US6797580B1 (en) * 2003-02-21 2004-09-28 Newport Fab, Llc Method for fabricating a bipolar transistor in a BiCMOS process and related structure

Also Published As

Publication number Publication date
SE0103726L (sv) 2003-05-10
US7008851B2 (en) 2006-03-07
SE522891C2 (sv) 2004-03-16
WO2003041152A1 (en) 2003-05-15
TW512441B (en) 2002-12-01
US20040201039A1 (en) 2004-10-14

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Legal Events

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