RU2007107953A - Способ и устройство для кодирования и декодирования данных - Google Patents

Способ и устройство для кодирования и декодирования данных Download PDF

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RU2007107953A
RU2007107953A RU2007107953/09A RU2007107953A RU2007107953A RU 2007107953 A RU2007107953 A RU 2007107953A RU 2007107953/09 A RU2007107953/09 A RU 2007107953/09A RU 2007107953 A RU2007107953 A RU 2007107953A RU 2007107953 A RU2007107953 A RU 2007107953A
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Юфей В. БЛАНКЕНШИП (US)
Юфей В. БЛАНКЕНШИП
Брайан К. КЛАССОН (US)
Брайан К. КЛАССОН
Т. Кит БЛАНКЕНШИП (US)
Т. Кит БЛАНКЕНШИП
Випул ДЕСАЙ (US)
Випул ДЕСАЙ
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Моторола, Инк. (US)
Моторола, Инк.
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393—Rate compatible low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1174—Parity-check or generator matrices built from sub-matrices representing known block codes such as, e.g. Hamming codes, e.g. generalized LDPC codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Claims (10)

1. Способ работы передатчика, который генерирует биты контроля четности p=(p 0 ,..., p m-1) на основании текущего набора символов s=(s 0 ,..., s k-1), причем способ содержит этапы, на которых принимают упомянутый текущий набор символов s=(s 0 ,..., s k-1); используют матрицу H для определения битов контроля четности и
передают биты контроля четности наряду с текущим набором символов;
где Н является расширением базовой матрицы Нb с Нb, содержащим секцию Нb1 и секцию Нb2, с Нb2, содержащим первую часть, имеющую колонку hb, имеющую нечетный вес больше 2, и вторую часть Н'b2, содержащую матричные элементы для строки i, столбца j, равные
1 для i=j,
1 для i=j+1,
0 в других местах;
где упомянутое расширение базовой матрицы Нb использует идентичные подматрицы для единиц в каждой колонке второй части Н'b2, и где упомянутое расширение использует парные подматрицы для четного количества единиц в hb.
2. Способ по п.1, в котором Нb расширена заменой каждой позиции Нb подматрицей размера z×z для порождения H.
3. Способ по п.1, в котором Нb расширена заменой каждого нулевого элемента Нb нулевой подматрицей размера z×z для порождения H.
4. Способ по п.1, в котором Нb расширена заменой каждого ненулевого элемента Нb ненулевой подматрицей для порождения H.
5. Способ по п.1, в котором Нb расширена заменой каждого ненулевого элемента Нb ненулевой подматрицей перестановок для порождения H.
6. Способ по п.1, в котором
Figure 00000001
где вектор hb имеет нечетный вес w h>=3.
7. Устройство, содержащее средство хранения для хранения матрицы H; микропроцессор, использующий матрицу H для определения битов контроля четности; и передатчик для передачи битов контроля четности;
где Н является расширением базовой матрицы Нb с Нb, содержащим секцию Нb1 и секцию Нb2, с Нb2, содержащей первую часть, имеющую колонку hb, имеющую нечетный вес больше 2, и вторую часть Н'b2, содержащую матричные элементы для строки i, столбца j, равные
1 для i=j,
1 для i=j+1,
0 в других местах; и
где две идентичные подматрицы используются для расширения единиц в каждой колонке Н'b2, и парные подматрицы используются для расширения четного количества 1 в hb.
8. Устройство по п.7, в котором
Figure 00000002
где вектор hb имеет нечетный вес w h>=3.
9. Устройство, содержащее средство хранения для хранения матрицы H: приемник для приема вектора y=(y 0 ,..., y n-1) сигнала и
микропроцессор, использующий матрицу H для определения текущего набора (s 0 ,..., s k-1) символов, где H является расширением базовой матрицы Нb, и где Нb содержит секцию Нb1 и секцию Нb2, и где Нb2 содержит первую часть, содержащую колонку hb, имеющую нечетный вес больше 2, и вторую часть Н'bm, содержащую матричные элементы для строки i, колонки j, равные
1 для i=j,
1 для i=j+1,
0 в других местах; и
где две идентичные подматрицы используются для расширения 1 в каждой колонке Н'b2, и парные подматрицы используются для расширения четного количества единиц в hb.
10. Устройство по п.9, в котором
Figure 00000003
где вектор hb имеет нечетный вес w h>=3.
RU2007107953/09A 2004-08-09 2005-08-03 Способ и устройство для кодирования и декодирования данных RU2370886C2 (ru)

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JP4516602B2 (ja) 2010-08-04
WO2006020495A1 (en) 2006-02-23
US7143333B2 (en) 2006-11-28
PL2387157T3 (pl) 2013-12-31
RU2370886C2 (ru) 2009-10-20
ES2421942T3 (es) 2013-09-06

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