ES2421942T3 - Codificación eficiente de códigos LDPC usando matrices de verificación de paridad estructuradas - Google Patents

Codificación eficiente de códigos LDPC usando matrices de verificación de paridad estructuradas

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Publication number
ES2421942T3
ES2421942T3 ES11177322T ES11177322T ES2421942T3 ES 2421942 T3 ES2421942 T3 ES 2421942T3 ES 11177322 T ES11177322 T ES 11177322T ES 11177322 T ES11177322 T ES 11177322T ES 2421942 T3 ES2421942 T3 ES 2421942T3
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Prior art keywords
matrix
hbm
sequence
negative
ldpc codes
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Yufei W Blankenship
Brian K Classon
T Keith Blankenship
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Motorola Mobility LLC
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Motorola Mobility LLC
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393—Rate compatible low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1174—Parity-check or generator matrices built from sub-matrices representing known block codes such as, e.g. Hamming codes, e.g. generalized LDPC codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

Un método de codificar LDPC una secuencia de información s (s0, s1,..., sk-1) de longitud k >= kb * z usando unamatriz modelo mb x nb Hbm, con elementos de matriz p(i,j), i >= 0, 1, ..., mb-1 y j >= 0, 1, ..., nb-1, para obtener unasecuencia de paridad p (p0, p1, ..., pm-1)' m >= mb * z denotado por v, donde v >= [v(0) v(1) ... v(mb -1)] y cada elementode v es un vector de columna como v(i) >= [piz piz+1 ... p(i+1)z-1]T,I >= 0, 1, ..., mb-1, incluyendo el método * dividir la secuencia de información s en kb >= kb >= nb-mb grupos de z bits denotados por u >= [u(0) u(1) ... u(kb - 1)],donde cada elemento de u es un vector de columna como sigue**Fórmula** , i >= 0, 1, ..., kb-1; * determinar v(0) por v(0) >= donde x denota el índice de fila de hbm donde la entrada tiene el único valor no negativo que se usa un número imparde veces dentro de hbm y hbm es la kb-ésima columna de la matriz modelo Hbm, donde una matriz de verificación deparidad del código LDPC es una expansión de la matriz modelo Hbm reproduciendo cada p(i, j) negativo por unamatriz todo ceros zxz y cada p(i,j) no negativo por una matriz de permutación Pp(i,j) que es una matriz de identidadzxz cuyas columnas son circulares desplazadas por un tamaño de desplazamiento circular de p(i,j) a la derecha;* determinar v(1), v(2), v(3), ..., v(mb-1) por **Fórmula**
ES11177322T 2004-08-09 2005-08-03 Codificación eficiente de códigos LDPC usando matrices de verificación de paridad estructuradas Active ES2421942T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60000504P 2004-08-09 2004-08-09
US11/004,359 US7143333B2 (en) 2004-08-09 2004-12-03 Method and apparatus for encoding and decoding data

Publications (1)

Publication Number Publication Date
ES2421942T3 true ES2421942T3 (es) 2013-09-06

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Country Link
US (1) US7143333B2 (es)
EP (2) EP2387157B1 (es)
JP (1) JP4516602B2 (es)
KR (1) KR100884698B1 (es)
CN (1) CN101032082B (es)
BR (1) BRPI0514179B1 (es)
ES (1) ES2421942T3 (es)
PL (1) PL2387157T3 (es)
RU (1) RU2370886C2 (es)
WO (1) WO2006020495A1 (es)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100906474B1 (ko) * 2003-01-29 2009-07-08 삼성전자주식회사 저밀도 부가정보 발생용 매트릭스를 이용한 에러 정정방법 및그 장치
US7581157B2 (en) * 2004-06-24 2009-08-25 Lg Electronics Inc. Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system
KR101065693B1 (ko) * 2004-09-17 2011-09-19 엘지전자 주식회사 Ｌｄｐｃ 코드를 이용한 부호화, 복호화 방법 및 부호화또는 복호화를 위한 ｌｄｐｃ 코드 생성 방법
JP4820368B2 (ja) * 2004-09-17 2011-11-24 エルジー エレクトロニクス インコーポレイティド Ｌｄｐｃコードを用いた符号化及び復号化方法
JP2008515342A (ja) * 2004-10-01 2008-05-08 トムソン ライセンシング 低密度パリティ検査（ｌｄｐｃ）復号器
EP1829223B1 (en) * 2004-12-22 2013-02-13 LG Electronics Inc. Parallel, layered decoding for Low-Density Parity-Check (LDPC) codes
CN100486150C (zh) * 2005-01-23 2009-05-06 中兴通讯股份有限公司 基于非正则低密度奇偶校验码的编译码器及其生成方法
US20070180344A1 (en) * 2006-01-31 2007-08-02 Jacobsen Eric A Techniques for low density parity check for forward error correction in high-data rate transmission
US7941737B2 (en) * 2006-04-19 2011-05-10 Tata Consultancy Services Limited Low density parity check code decoder
KR101119111B1 (ko) * 2006-05-04 2012-03-16 엘지전자 주식회사 Ｌｄｐｃ 부호를 이용한 데이터 재전송 방법
KR101227514B1 (ko) 2007-03-15 2013-01-31 엘지전자 주식회사 Ｌｄｐｃ 부호화 및 복호화를 위한 모델 행렬을 구성하는방법
US8359522B2 (en) 2007-05-01 2013-01-22 Texas A&M University System Low density parity check decoder for regular LDPC codes
US20080320374A1 (en) * 2007-06-22 2008-12-25 Legend Silicon Corp. Method and apparatus for decoding a ldpc code
JP4823176B2 (ja) * 2007-08-31 2011-11-24 パナソニック株式会社 復号方法及び復号装置
KR101418467B1 (ko) * 2008-08-15 2014-07-10 엘에스아이 코포레이션 니어 코드워드들의 ｒａｍ 리스트-디코딩
EP2307960B1 (en) 2009-04-21 2018-01-10 Avago Technologies General IP (Singapore) Pte. Ltd. Error-floor mitigation of codes using write verification
US8392789B2 (en) * 2009-07-28 2013-03-05 Texas Instruments Incorporated Method and system for decoding low density parity check codes
US8464142B2 (en) 2010-04-23 2013-06-11 Lsi Corporation Error-correction decoder employing extrinsic message averaging
US8499226B2 (en) 2010-06-29 2013-07-30 Lsi Corporation Multi-mode layered decoding
US8458555B2 (en) 2010-06-30 2013-06-04 Lsi Corporation Breaking trapping sets using targeted bit adjustment
US8504900B2 (en) 2010-07-02 2013-08-06 Lsi Corporation On-line discovery and filtering of trapping sets
US8768990B2 (en) 2011-11-11 2014-07-01 Lsi Corporation Reconfigurable cyclic shifter arrangement
US8977937B2 (en) * 2012-03-16 2015-03-10 Lsi Corporation Systems and methods for compression driven variable rate decoding in a data processing system
RU2012146685A (ru) 2012-11-01 2014-05-10 ЭлЭсАй Корпорейшн База данных наборов-ловушек для декодера на основе разреженного контроля четности
US9203440B1 (en) 2013-01-29 2015-12-01 Xilinx, Inc. Matrix expansion
US9083383B1 (en) * 2013-01-29 2015-07-14 Xilinx, Inc. Parity check matrix
JP6542132B2 (ja) 2013-02-13 2019-07-10 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ 高レート、高並列性、および低エラーフロアのために、疑似巡回構成を使用し、パンクチャするｌｄｐｃ設計
CN106201781B (zh) * 2016-07-11 2019-02-26 华侨大学 一种基于右边正则纠删码的云数据存储方法
US10289348B2 (en) * 2016-12-30 2019-05-14 Western Digital Technologies, Inc. Tapered variable node memory
SG11202009379VA (en) 2017-03-24 2020-10-29 Zte Corp Processing method and device for quasi-cyclic low density parity check coding

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4564944A (en) * 1983-12-30 1986-01-14 International Business Machines Corporation Error correcting scheme
JPS6250943A (ja) * 1985-08-30 1987-03-05 Hitachi Ltd 記憶装置
US20020042899A1 (en) * 2000-06-16 2002-04-11 Tzannes Marcos C. Systems and methods for LDPC coded modulation
US6567465B2 (en) * 2001-05-21 2003-05-20 Pc Tel Inc. DSL modem utilizing low density parity check codes
US6948109B2 (en) * 2001-10-24 2005-09-20 Vitesse Semiconductor Corporation Low-density parity check forward error correction
ES2427179T3 (es) * 2002-07-03 2013-10-29 Dtvg Licensing, Inc Codificación de los códigos de comprobación de paridad de baja densidad
AU2002364182A1 (en) * 2002-08-20 2004-03-11 Flarion Technologies, Inc. Methods and apparatus for encoding ldpc codes
US6785863B2 (en) * 2002-09-18 2004-08-31 Motorola, Inc. Method and apparatus for generating parity-check bits from a symbol set
KR20040033554A (ko) * 2002-10-15 2004-04-28 삼성전자주식회사 에러 정정 부호화 장치 및 그 방법
KR20040036460A (ko) * 2002-10-26 2004-04-30 삼성전자주식회사 Ｌｄｐｃ 복호화 장치 및 그 방법
US7702986B2 (en) * 2002-11-18 2010-04-20 Qualcomm Incorporated Rate-compatible LDPC codes
KR100809619B1 (ko) * 2003-08-26 2008-03-05 삼성전자주식회사 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법

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CN101032082B (zh) 2010-09-15
JP4516602B2 (ja) 2010-08-04
PL2387157T3 (pl) 2013-12-31
US20060031744A1 (en) 2006-02-09
EP2387157B1 (en) 2013-07-10
RU2370886C2 (ru) 2009-10-20
RU2007107953A (ru) 2008-09-20
EP1790081A4 (en) 2009-06-03
KR20070035072A (ko) 2007-03-29
BRPI0514179A (pt) 2008-06-03
WO2006020495A1 (en) 2006-02-23
EP1790081A1 (en) 2007-05-30
EP2387157A1 (en) 2011-11-16
CN101032082A (zh) 2007-09-05
BRPI0514179B1 (pt) 2018-01-23
KR100884698B1 (ko) 2009-02-19
US7143333B2 (en) 2006-11-28
JP2008509635A (ja) 2008-03-27

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