PL211560A1 - Sposob badania ukladu scalonego i uklad scalony - Google Patents

Sposob badania ukladu scalonego i uklad scalony

Info

Publication number
PL211560A1
PL211560A1 PL21156078A PL21156078A PL211560A1 PL 211560 A1 PL211560 A1 PL 211560A1 PL 21156078 A PL21156078 A PL 21156078A PL 21156078 A PL21156078 A PL 21156078A PL 211560 A1 PL211560 A1 PL 211560A1
Authority
PL
Poland
Prior art keywords
chip
circuit
connections
test
open
Prior art date
Application number
PL21156078A
Other languages
English (en)
Inventor
Raymond C Yuen
Mark A Menezes
Herbert Stopper
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of PL211560A1 publication Critical patent/PL211560A1/pl

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. by varying supply voltage
    • G01R31/3004Current or voltage test
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/006Identification
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/83Indexing scheme relating to error detection, to error correction, and to monitoring the solution involving signatures

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
PL21156078A 1977-12-23 1978-12-08 Sposob badania ukladu scalonego i uklad scalony PL211560A1 (pl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/863,696 US4183460A (en) 1977-12-23 1977-12-23 In-situ test and diagnostic circuitry and method for CML chips

Publications (1)

Publication Number Publication Date
PL211560A1 true PL211560A1 (pl) 1979-08-27

Family

ID=25341594

Family Applications (1)

Application Number Title Priority Date Filing Date
PL21156078A PL211560A1 (pl) 1977-12-23 1978-12-08 Sposob badania ukladu scalonego i uklad scalony

Country Status (12)

Country Link
US (1) US4183460A (pl)
JP (1) JPS5492069A (pl)
BR (1) BR7808233A (pl)
DE (1) DE2854549A1 (pl)
FR (1) FR2412848A1 (pl)
GB (1) GB2010497B (pl)
IN (1) IN150900B (pl)
IT (1) IT1100622B (pl)
NL (1) NL182025C (pl)
PL (1) PL211560A1 (pl)
SE (1) SE433671B (pl)
YU (1) YU287178A (pl)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2905271A1 (de) * 1979-02-12 1980-08-21 Philips Patentverwaltung Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren
DE2905294A1 (de) * 1979-02-12 1980-08-21 Philips Patentverwaltung Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren
US4479088A (en) * 1981-01-16 1984-10-23 Burroughs Corporation Wafer including test lead connected to ground for testing networks thereon
US4395767A (en) * 1981-04-20 1983-07-26 Control Data Corporation Interconnect fault detector for LSI logic chips
US4504784A (en) * 1981-07-02 1985-03-12 International Business Machines Corporation Method of electrically testing a packaging structure having N interconnected integrated circuit chips
US4494066A (en) * 1981-07-02 1985-01-15 International Business Machines Corporation Method of electrically testing a packaging structure having n interconnected integrated circuit chips
US4441075A (en) * 1981-07-02 1984-04-03 International Business Machines Corporation Circuit arrangement which permits the testing of each individual chip and interchip connection in a high density packaging structure having a plurality of interconnected chips, without any physical disconnection
US4509008A (en) * 1982-04-20 1985-04-02 International Business Machines Corporation Method of concurrently testing each of a plurality of interconnected integrated circuit chips
US4638246A (en) * 1984-09-21 1987-01-20 Gte Laboratories Incorporated Integrated circuit input-output diagnostic system
US4656417A (en) * 1985-07-29 1987-04-07 International Business Machines Corporation Test circuit for differential cascode voltage switch
US5051996A (en) * 1989-03-27 1991-09-24 The United States Of America As Represented By The United States Department Of Energy Built-in-test by signature inspection (bitsi)
US5289113A (en) * 1989-08-01 1994-02-22 Analog Devices, Inc. PROM for integrated circuit identification and testing
US5377124A (en) * 1989-09-20 1994-12-27 Aptix Corporation Field programmable printed circuit board
EP0481703B1 (en) * 1990-10-15 2003-09-17 Aptix Corporation Interconnect substrate having integrated circuit for programmable interconnection and sample testing
US5440230A (en) * 1993-04-02 1995-08-08 Heflinger; Bruce L. Combinatorial signature for component identification
KR100382063B1 (ko) * 1996-08-21 2003-06-18 삼성에스디아이 주식회사 활물질 열화 평가를 위한 in situ 도전율 측정장치
US7437638B2 (en) * 2002-11-12 2008-10-14 Agilent Technologies, Inc. Boundary-Scan methods and apparatus
US7447964B2 (en) * 2005-01-03 2008-11-04 International Business Machines Corporation Difference signal path test and characterization circuit
KR100690275B1 (ko) * 2006-01-31 2007-03-12 삼성전자주식회사 테스트 모드에서 전압모드로 동작하는 전류모드 반도체집적회로장치
EP2039248A1 (de) * 2007-09-21 2009-03-25 Bayer CropScience AG Wirkstoffkombinationen mit insektiziden und akariziden Eigenschaften
JP5476876B2 (ja) * 2009-09-11 2014-04-23 株式会社リコー センサ駆動回路、ドライバ装置、画像読取装置、及び画像形成装置
CN104732947B (zh) * 2015-04-16 2017-02-22 京东方科技集团股份有限公司 一种驱动芯片、驱动板及其测试方法、显示装置
US10473711B2 (en) * 2016-04-15 2019-11-12 Infineon Technologies Ag Multi-channel fault detection with a single diagnosis output
CN106569118B (zh) * 2016-10-08 2019-09-10 芯海科技(深圳)股份有限公司 一种芯片短路失效检测系统及方法
CN108226749A (zh) * 2017-12-11 2018-06-29 天津津航计算技术研究所 一种sip芯片故障检测系统及检测方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3582633A (en) * 1968-02-20 1971-06-01 Lockheed Aircraft Corp Method and apparatus for fault detection in a logic circuit
NL7005372A (pl) * 1970-04-15 1971-10-19
US3815025A (en) * 1971-10-18 1974-06-04 Ibm Large-scale integrated circuit testing structure
BE790243A (fr) * 1971-11-08 1973-02-15 Burroughs Corp Procede et appareil de verification de sous-systemes de circuits binaires
JPS5213915B2 (pl) * 1972-02-14 1977-04-18
US3792349A (en) * 1972-10-25 1974-02-12 Honeywell Inf Systems Dual channel, dual potential open-circuit test apparatus
FR2330014A1 (fr) * 1973-05-11 1977-05-27 Ibm France Procede de test de bloc de circuits logiques integres et blocs en faisant application
US3924181A (en) * 1973-10-16 1975-12-02 Hughes Aircraft Co Test circuitry employing a cyclic code generator
US3976864A (en) * 1974-09-03 1976-08-24 Hewlett-Packard Company Apparatus and method for testing digital circuits
US3919533A (en) * 1974-11-08 1975-11-11 Westinghouse Electric Corp Electrical fault indicator
US4009437A (en) * 1976-03-31 1977-02-22 Burroughs Corporation Net analyzer for electronic circuits
US4055802A (en) * 1976-08-12 1977-10-25 Bell Telephone Laboratories, Incorporated Electrical identification of multiply configurable circuit array

Also Published As

Publication number Publication date
JPS6321154B2 (pl) 1988-05-02
SE7812490L (sv) 1979-06-24
FR2412848A1 (fr) 1979-07-20
IN150900B (pl) 1983-01-08
NL7812362A (nl) 1979-06-26
NL182025C (nl) 1987-12-16
US4183460A (en) 1980-01-15
DE2854549A1 (de) 1979-06-28
SE433671B (sv) 1984-06-04
GB2010497B (en) 1982-06-30
GB2010497A (en) 1979-06-27
BR7808233A (pt) 1979-08-14
FR2412848B1 (pl) 1983-03-18
NL182025B (nl) 1987-07-16
YU287178A (en) 1982-10-31
DE2854549C2 (pl) 1987-06-11
IT7830659A0 (it) 1978-12-06
IT1100622B (it) 1985-09-28
JPS5492069A (en) 1979-07-20

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