FR2412848A1 - Circuit d'essai et de diagnostic in situ et procede applicable a des circuits logiques integres fonctionnant en mode de courant - Google Patents
Circuit d'essai et de diagnostic in situ et procede applicable a des circuits logiques integres fonctionnant en mode de courantInfo
- Publication number
- FR2412848A1 FR2412848A1 FR7834696A FR7834696A FR2412848A1 FR 2412848 A1 FR2412848 A1 FR 2412848A1 FR 7834696 A FR7834696 A FR 7834696A FR 7834696 A FR7834696 A FR 7834696A FR 2412848 A1 FR2412848 A1 FR 2412848A1
- Authority
- FR
- France
- Prior art keywords
- circuit
- chosen
- output
- current mode
- logic circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/006—Identification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/83—Indexing scheme relating to error detection, to error correction, and to monitoring the solution involving signatures
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
A.CIRCUIT D'ESSAI ET DE DIAGNOSTIC IN SITU ET PROCEDE APPLICABLE A DES CIRCUITS LOGIQUES INTEGRES FONCTIONNANT EN MODE DE COURANT. B.CIRCUIT CARACTERISE EN CE QU'IL COMPORTE UN CIRCUIT D'ESSAI ET DE DETECTION D'INCIDENT RELIE A L'UN CHOISI DES MOYENS D'ENTREE ET CREER UN SIGNAL SUR LA SORTIE CHOISIE, UN MOYEN POUR DETECTER UN INCIDENT SUR LA SORTIE ET CREER UN SIGNAL SUR LA SORTIE CHOISIE, UN MOYEN POUR DETERMINER LA CLASSE DU CIRCUIT INTEGRE COMPORTANT CE CIRCUIT DE DETECTION ET D'ESSAI D'INCIDENT ET CREANT UN SIGNAL A LA SORTIE CHOISIE LORSQUE LA CLASSE ADEQUATE DU CIRCUIT INTEGRE A ETE CHOISIE, AINSI QU'UN MOYEN SENSIBLE AUX SIGNAUX APPLIQUES A LA SORTIE CHOISIE POUR RECONNAITRE LA SIGNATURE DU CIRCUIT INTEGRE ET DETECTER AINSI TOUTE ERREUR DU CIRCUIT DE FONCTIONS LOGIQUES DE CE CIRCUIT.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/863,696 US4183460A (en) | 1977-12-23 | 1977-12-23 | In-situ test and diagnostic circuitry and method for CML chips |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2412848A1 true FR2412848A1 (fr) | 1979-07-20 |
FR2412848B1 FR2412848B1 (fr) | 1983-03-18 |
Family
ID=25341594
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7834696A Granted FR2412848A1 (fr) | 1977-12-23 | 1978-12-08 | Circuit d'essai et de diagnostic in situ et procede applicable a des circuits logiques integres fonctionnant en mode de courant |
Country Status (12)
Country | Link |
---|---|
US (1) | US4183460A (fr) |
JP (1) | JPS5492069A (fr) |
BR (1) | BR7808233A (fr) |
DE (1) | DE2854549A1 (fr) |
FR (1) | FR2412848A1 (fr) |
GB (1) | GB2010497B (fr) |
IN (1) | IN150900B (fr) |
IT (1) | IT1100622B (fr) |
NL (1) | NL182025C (fr) |
PL (1) | PL211560A1 (fr) |
SE (1) | SE433671B (fr) |
YU (1) | YU287178A (fr) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2905294A1 (de) * | 1979-02-12 | 1980-08-21 | Philips Patentverwaltung | Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren |
DE2905271A1 (de) * | 1979-02-12 | 1980-08-21 | Philips Patentverwaltung | Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren |
US4479088A (en) * | 1981-01-16 | 1984-10-23 | Burroughs Corporation | Wafer including test lead connected to ground for testing networks thereon |
US4395767A (en) * | 1981-04-20 | 1983-07-26 | Control Data Corporation | Interconnect fault detector for LSI logic chips |
US4441075A (en) * | 1981-07-02 | 1984-04-03 | International Business Machines Corporation | Circuit arrangement which permits the testing of each individual chip and interchip connection in a high density packaging structure having a plurality of interconnected chips, without any physical disconnection |
US4494066A (en) * | 1981-07-02 | 1985-01-15 | International Business Machines Corporation | Method of electrically testing a packaging structure having n interconnected integrated circuit chips |
US4504784A (en) * | 1981-07-02 | 1985-03-12 | International Business Machines Corporation | Method of electrically testing a packaging structure having N interconnected integrated circuit chips |
US4509008A (en) * | 1982-04-20 | 1985-04-02 | International Business Machines Corporation | Method of concurrently testing each of a plurality of interconnected integrated circuit chips |
US4638246A (en) * | 1984-09-21 | 1987-01-20 | Gte Laboratories Incorporated | Integrated circuit input-output diagnostic system |
US4656417A (en) * | 1985-07-29 | 1987-04-07 | International Business Machines Corporation | Test circuit for differential cascode voltage switch |
US5051996A (en) * | 1989-03-27 | 1991-09-24 | The United States Of America As Represented By The United States Department Of Energy | Built-in-test by signature inspection (bitsi) |
US5289113A (en) * | 1989-08-01 | 1994-02-22 | Analog Devices, Inc. | PROM for integrated circuit identification and testing |
US5377124A (en) * | 1989-09-20 | 1994-12-27 | Aptix Corporation | Field programmable printed circuit board |
EP0481703B1 (fr) * | 1990-10-15 | 2003-09-17 | Aptix Corporation | Substrat d'interconnexion avec circuit intégré pour interconnection programmable et l'analyse d'échantillons |
US5440230A (en) * | 1993-04-02 | 1995-08-08 | Heflinger; Bruce L. | Combinatorial signature for component identification |
KR100382063B1 (ko) * | 1996-08-21 | 2003-06-18 | 삼성에스디아이 주식회사 | 활물질 열화 평가를 위한 in situ 도전율 측정장치 |
US7437638B2 (en) * | 2002-11-12 | 2008-10-14 | Agilent Technologies, Inc. | Boundary-Scan methods and apparatus |
US7447964B2 (en) * | 2005-01-03 | 2008-11-04 | International Business Machines Corporation | Difference signal path test and characterization circuit |
KR100690275B1 (ko) * | 2006-01-31 | 2007-03-12 | 삼성전자주식회사 | 테스트 모드에서 전압모드로 동작하는 전류모드 반도체집적회로장치 |
EP2039248A1 (fr) * | 2007-09-21 | 2009-03-25 | Bayer CropScience AG | Combinaisons d'agents actifs à propriétés insecticides et acaricides |
JP5476876B2 (ja) * | 2009-09-11 | 2014-04-23 | 株式会社リコー | センサ駆動回路、ドライバ装置、画像読取装置、及び画像形成装置 |
CN104732947B (zh) * | 2015-04-16 | 2017-02-22 | 京东方科技集团股份有限公司 | 一种驱动芯片、驱动板及其测试方法、显示装置 |
US10473711B2 (en) * | 2016-04-15 | 2019-11-12 | Infineon Technologies Ag | Multi-channel fault detection with a single diagnosis output |
CN106569118B (zh) * | 2016-10-08 | 2019-09-10 | 芯海科技(深圳)股份有限公司 | 一种芯片短路失效检测系统及方法 |
CN108226749A (zh) * | 2017-12-11 | 2018-06-29 | 天津津航计算技术研究所 | 一种sip芯片故障检测系统及检测方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3792349A (en) * | 1972-10-25 | 1974-02-12 | Honeywell Inf Systems | Dual channel, dual potential open-circuit test apparatus |
US4009437A (en) * | 1976-03-31 | 1977-02-22 | Burroughs Corporation | Net analyzer for electronic circuits |
FR2330014A1 (fr) * | 1973-05-11 | 1977-05-27 | Ibm France | Procede de test de bloc de circuits logiques integres et blocs en faisant application |
US4055802A (en) * | 1976-08-12 | 1977-10-25 | Bell Telephone Laboratories, Incorporated | Electrical identification of multiply configurable circuit array |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3582633A (en) * | 1968-02-20 | 1971-06-01 | Lockheed Aircraft Corp | Method and apparatus for fault detection in a logic circuit |
NL7005372A (fr) * | 1970-04-15 | 1971-10-19 | ||
US3815025A (en) * | 1971-10-18 | 1974-06-04 | Ibm | Large-scale integrated circuit testing structure |
BE790243A (fr) * | 1971-11-08 | 1973-02-15 | Burroughs Corp | Procede et appareil de verification de sous-systemes de circuits binaires |
JPS5213915B2 (fr) * | 1972-02-14 | 1977-04-18 | ||
US3924181A (en) * | 1973-10-16 | 1975-12-02 | Hughes Aircraft Co | Test circuitry employing a cyclic code generator |
US3976864A (en) * | 1974-09-03 | 1976-08-24 | Hewlett-Packard Company | Apparatus and method for testing digital circuits |
US3919533A (en) * | 1974-11-08 | 1975-11-11 | Westinghouse Electric Corp | Electrical fault indicator |
-
1977
- 1977-12-23 US US05/863,696 patent/US4183460A/en not_active Expired - Lifetime
-
1978
- 1978-11-21 IN IN1258/CAL/78A patent/IN150900B/en unknown
- 1978-11-24 GB GB7845902A patent/GB2010497B/en not_active Expired
- 1978-12-05 SE SE7812490A patent/SE433671B/sv not_active IP Right Cessation
- 1978-12-06 IT IT30659/78A patent/IT1100622B/it active
- 1978-12-07 YU YU02871/78A patent/YU287178A/xx unknown
- 1978-12-08 PL PL21156078A patent/PL211560A1/xx unknown
- 1978-12-08 FR FR7834696A patent/FR2412848A1/fr active Granted
- 1978-12-08 JP JP15259678A patent/JPS5492069A/ja active Granted
- 1978-12-14 BR BR7808233A patent/BR7808233A/pt unknown
- 1978-12-18 DE DE19782854549 patent/DE2854549A1/de active Granted
- 1978-12-20 NL NLAANVRAGE7812362,A patent/NL182025C/xx not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3792349A (en) * | 1972-10-25 | 1974-02-12 | Honeywell Inf Systems | Dual channel, dual potential open-circuit test apparatus |
FR2330014A1 (fr) * | 1973-05-11 | 1977-05-27 | Ibm France | Procede de test de bloc de circuits logiques integres et blocs en faisant application |
US4009437A (en) * | 1976-03-31 | 1977-02-22 | Burroughs Corporation | Net analyzer for electronic circuits |
US4055802A (en) * | 1976-08-12 | 1977-10-25 | Bell Telephone Laboratories, Incorporated | Electrical identification of multiply configurable circuit array |
Non-Patent Citations (1)
Title |
---|
EXBK/72 * |
Also Published As
Publication number | Publication date |
---|---|
IT1100622B (it) | 1985-09-28 |
NL182025B (nl) | 1987-07-16 |
SE7812490L (sv) | 1979-06-24 |
IT7830659A0 (it) | 1978-12-06 |
BR7808233A (pt) | 1979-08-14 |
GB2010497A (en) | 1979-06-27 |
FR2412848B1 (fr) | 1983-03-18 |
NL182025C (nl) | 1987-12-16 |
IN150900B (fr) | 1983-01-08 |
YU287178A (en) | 1982-10-31 |
NL7812362A (nl) | 1979-06-26 |
GB2010497B (en) | 1982-06-30 |
JPS6321154B2 (fr) | 1988-05-02 |
JPS5492069A (en) | 1979-07-20 |
SE433671B (sv) | 1984-06-04 |
DE2854549C2 (fr) | 1987-06-11 |
US4183460A (en) | 1980-01-15 |
DE2854549A1 (de) | 1979-06-28 |
PL211560A1 (pl) | 1979-08-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name | ||
TP | Transmission of property | ||
ST | Notification of lapse |