BE899941A - Dispositif de test de circuit numerique. - Google Patents

Dispositif de test de circuit numerique.

Info

Publication number
BE899941A
BE899941A BE0/213162A BE213162A BE899941A BE 899941 A BE899941 A BE 899941A BE 0/213162 A BE0/213162 A BE 0/213162A BE 213162 A BE213162 A BE 213162A BE 899941 A BE899941 A BE 899941A
Authority
BE
Belgium
Prior art keywords
cycles
test device
digital circuit
circuit test
circuit
Prior art date
Application number
BE0/213162A
Other languages
English (en)
Inventor
J Gannett
Original Assignee
American Telephone & Telegraph
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone & Telegraph filed Critical American Telephone & Telegraph
Publication of BE899941A publication Critical patent/BE899941A/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

Pour tester un circuit logique numérique (100), on lui applique un mot d'entrée prédéterminé pendant les trois premiers cycles d'une opération de test comportant un grand nombre de cycles. Pendant les cycles restants de l'opération de test, chaque borne de sortie du circuit est connectée par un multiplexeur d'entrée (200) à une ou plusieurs de ses bornes d'entrée. Au bout d'un nombre de cycles déterminé, un détecteur de signature (400) compare chaque bit des bornes de sortie avec le bit ''correct'' correspondant, toute discordance indiquant l'existence d'un défaut dans le circuit.
BE0/213162A 1983-06-20 1984-06-18 Dispositif de test de circuit numerique. BE899941A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/506,070 US4551838A (en) 1983-06-20 1983-06-20 Self-testing digital circuits

Publications (1)

Publication Number Publication Date
BE899941A true BE899941A (fr) 1984-10-15

Family

ID=24013045

Family Applications (1)

Application Number Title Priority Date Filing Date
BE0/213162A BE899941A (fr) 1983-06-20 1984-06-18 Dispositif de test de circuit numerique.

Country Status (9)

Country Link
US (1) US4551838A (fr)
JP (1) JPH0641968B2 (fr)
BE (1) BE899941A (fr)
CA (1) CA1213325A (fr)
DE (1) DE3422287A1 (fr)
FR (1) FR2548382B1 (fr)
GB (1) GB2141829B (fr)
IT (1) IT1175519B (fr)
NL (1) NL192355C (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6068624A (ja) * 1983-09-26 1985-04-19 Toshiba Corp Ｌｓｉの自己検査装置
JPS60213873A (ja) * 1984-04-06 1985-10-26 Advantest Corp ロジツクアナライザ
US4644265A (en) * 1985-09-03 1987-02-17 International Business Machines Corporation Noise reduction during testing of integrated circuit chips
US4890270A (en) * 1988-04-08 1989-12-26 Sun Microsystems Method and apparatus for measuring the speed of an integrated circuit device
US5488615A (en) * 1990-02-28 1996-01-30 Ail Systems, Inc. Universal digital signature bit device
US5230000A (en) * 1991-04-25 1993-07-20 At&T Bell Laboratories Built-in self-test (bist) circuit
US5515383A (en) * 1991-05-28 1996-05-07 The Boeing Company Built-in self-test system and method for self test of an integrated circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3783254A (en) * 1972-10-16 1974-01-01 Ibm Level sensitive logic system
JPS5352029A (en) * 1976-10-22 1978-05-12 Fujitsu Ltd Arithmetic circuit unit
DE2842750A1 (de) * 1978-09-30 1980-04-10 Ibm Deutschland Verfahren und anordnung zur pruefung von durch monolithisch integrierten halbleiterschaltungen dargestellten sequentiellen schaltungen
US4225957A (en) * 1978-10-16 1980-09-30 International Business Machines Corporation Testing macros embedded in LSI chips
DE2902375C2 (de) * 1979-01-23 1984-05-17 Siemens AG, 1000 Berlin und 8000 München Logikbaustein für integrierte Digitalschaltungen
DE3009945C2 (de) * 1979-03-15 1987-03-19 Nippon Electric Co., Ltd., Tokio/Tokyo Funktionsprüfbarer, integrierter Schaltkreis
US4320509A (en) * 1979-10-19 1982-03-16 Bell Telephone Laboratories, Incorporated LSI Circuit logic structure including data compression circuitry
US4377757A (en) * 1980-02-11 1983-03-22 Siemens Aktiengesellschaft Logic module for integrated digital circuits
US4340857A (en) * 1980-04-11 1982-07-20 Siemens Corporation Device for testing digital circuits using built-in logic block observers (BILBO's)
NL8004176A (nl) * 1980-07-21 1982-02-16 Philips Nv Inrichting voor het testen van een schakeling met digitaal werkende en kombinatorisch werkende onderdelen.

Also Published As

Publication number Publication date
NL192355C (nl) 1997-06-04
DE3422287C2 (fr) 1993-09-23
FR2548382B1 (fr) 1987-12-04
GB2141829B (en) 1987-03-18
JPS6015570A (ja) 1985-01-26
FR2548382A1 (fr) 1985-01-04
IT1175519B (it) 1987-07-01
NL192355B (nl) 1997-02-03
JPH0641968B2 (ja) 1994-06-01
US4551838A (en) 1985-11-05
GB8415145D0 (en) 1984-07-18
NL8401925A (nl) 1985-01-16
GB2141829A (en) 1985-01-03
CA1213325A (fr) 1986-10-28
IT8421499A0 (it) 1984-06-19
DE3422287A1 (de) 1984-12-20

Similar Documents

Publication Publication Date Title
US4298980A (en) LSI Circuitry conforming to level sensitive scan design (LSSD) rules and method of testing same
ATE14939T1 (de) Apparatur zum dynamischen tasten im schaltkreis von elektronischen digital-schaltkreiselementen.
EP0227696A1 (fr) Systeme de test sur une puce pour reseaux de portes configurables
KR880014475A (ko) 반도체 집적회로장치
DE3274300D1 (en) Logic circuit interconnect fault detection system
BE899941A (fr) Dispositif de test de circuit numerique.
FR2372471A1 (fr) Dispositif de recapitulation d'etat
FR2432715A1 (fr) Appareil de test destine a tester des plaques de circuits imprimes
FR2372469A1 (fr) Unite de connexion de diagnostic dans un systeme de traitement de donnees
JPS6243579A (ja) 集積論理回路装置
SU473183A1 (ru) Дискретное логическое устройство
JPH06201794A (ja) 半導体装置のテスト回路
SU1674132A1 (ru) Устройство дл контрол логических блоков
SU1679667A1 (ru) Устройство для мажоритарного выбора асинхронных сигналов
JPS57212539A (en) Arithmetic device
SU1277385A1 (ru) Г-триггер
SU1005061A1 (ru) Устройство дл контрол цифровых узлов
SU1019371A1 (ru) Устройство дл контрол соединений электрических цепей
JPS6222874Y2 (fr)
SU1176270A1 (ru) Устройство контрол контактировани выводов интегральной схемы
SU941910A1 (ru) Устройство дл обнаружени места короткого замыкани двух электрических цепей
JPS6378695A (ja) 回線接続装置
SU788378A1 (ru) Устройство контрол кода "1 из
JPH0621815A (ja) 集積回路
JPH03108676A (ja) 集積回路の遅延時間測定方法

Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: AMERICAN TELEPHONE AND TELEGRAPH CY

Effective date: 20000630