ATE14939T1 - Apparatur zum dynamischen tasten im schaltkreis von elektronischen digital-schaltkreiselementen. - Google Patents

Apparatur zum dynamischen tasten im schaltkreis von elektronischen digital-schaltkreiselementen.

Info

Publication number
ATE14939T1
ATE14939T1 AT81303755T AT81303755T ATE14939T1 AT E14939 T1 ATE14939 T1 AT E14939T1 AT 81303755 T AT81303755 T AT 81303755T AT 81303755 T AT81303755 T AT 81303755T AT E14939 T1 ATE14939 T1 AT E14939T1
Authority
AT
Austria
Prior art keywords
devices
signals
library
test
dynamic
Prior art date
Application number
AT81303755T
Other languages
English (en)
Inventor
Milan Slamka
Mamdouh H Rassem
Original Assignee
Thalamus Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thalamus Electronics Inc filed Critical Thalamus Electronics Inc
Application granted granted Critical
Publication of ATE14939T1 publication Critical patent/ATE14939T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31915—In-circuit Testers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
AT81303755T 1980-08-18 1981-08-18 Apparatur zum dynamischen tasten im schaltkreis von elektronischen digital-schaltkreiselementen. ATE14939T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CA000358461A CA1163721A (en) 1980-08-18 1980-08-18 Apparatus for the dynamic in-circuit testing of electronic digital circuit elements
EP81303755A EP0046404B1 (de) 1980-08-18 1981-08-18 Apparatur zum dynamischen Tasten im Schaltkreis von elektronischen Digital-Schaltkreiselementen

Publications (1)

Publication Number Publication Date
ATE14939T1 true ATE14939T1 (de) 1985-08-15

Family

ID=4117670

Family Applications (1)

Application Number Title Priority Date Filing Date
AT81303755T ATE14939T1 (de) 1980-08-18 1981-08-18 Apparatur zum dynamischen tasten im schaltkreis von elektronischen digital-schaltkreiselementen.

Country Status (6)

Country Link
US (1) US4484329A (de)
EP (1) EP0046404B1 (de)
JP (1) JPS5760269A (de)
AT (1) ATE14939T1 (de)
CA (1) CA1163721A (de)
DE (1) DE3171811D1 (de)

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US5323108A (en) * 1992-01-23 1994-06-21 Hewlett-Packard Company Method for generating functional tests for printed circuit boards based on pattern matching of models
JP3181736B2 (ja) * 1992-12-25 2001-07-03 三菱電機株式会社 Ｉｃ機能試験装置及び試験方法
US5333112A (en) * 1993-03-25 1994-07-26 Aai/Acl Technologies, Inc. Automatic flow grind system and method
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US5590136A (en) * 1995-01-25 1996-12-31 Hewlett-Packard Co Method for creating an in-circuit test for an electronic device
US5539753A (en) * 1995-08-10 1996-07-23 International Business Machines Corporation Method and apparatus for output deselecting of data during test
US6157210A (en) 1997-10-16 2000-12-05 Altera Corporation Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits
US6408413B1 (en) 1998-02-18 2002-06-18 Texas Instruments Incorporated Hierarchical access of test access ports in embedded core integrated circuits
US6405335B1 (en) 1998-02-25 2002-06-11 Texas Instruments Incorporated Position independent testing of circuits
US7058862B2 (en) 2000-05-26 2006-06-06 Texas Instruments Incorporated Selecting different 1149.1 TAP domains from update-IR state
US6728915B2 (en) 2000-01-10 2004-04-27 Texas Instruments Incorporated IC with shared scan cells selectively connected in scan path
US6769080B2 (en) 2000-03-09 2004-07-27 Texas Instruments Incorporated Scan circuit low power adapter with counter
TW580578B (en) * 2000-10-03 2004-03-21 Concord Idea Corp System and method for testing integrated circuit devices
JP2004524530A (ja) * 2001-03-13 2004-08-12 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ 信頼性が改良された集積回路の試験装置
TW555982B (en) * 2002-01-03 2003-10-01 Winbond Electronics Corp EDC box compatible with various tester and EDC system
US7539912B2 (en) 2005-12-15 2009-05-26 King Tiger Technology, Inc. Method and apparatus for testing a fully buffered memory module
JP4843451B2 (ja) * 2006-10-19 2011-12-21 富士通株式会社 データ生成方法、結線チェックシステム、およびデータ生成プログラム
US7620861B2 (en) * 2007-05-31 2009-11-17 Kingtiger Technology (Canada) Inc. Method and apparatus for testing integrated circuits by employing test vector patterns that satisfy passband requirements imposed by communication channels
US7757144B2 (en) * 2007-11-01 2010-07-13 Kingtiger Technology (Canada) Inc. System and method for testing integrated circuit modules comprising a plurality of integrated circuit devices
US7848899B2 (en) * 2008-06-09 2010-12-07 Kingtiger Technology (Canada) Inc. Systems and methods for testing integrated circuit devices
US8356215B2 (en) * 2010-01-19 2013-01-15 Kingtiger Technology (Canada) Inc. Testing apparatus and method for analyzing a memory module operating within an application system
US8918686B2 (en) 2010-08-18 2014-12-23 Kingtiger Technology (Canada) Inc. Determining data valid windows in a system and method for testing an integrated circuit device
US9003256B2 (en) 2011-09-06 2015-04-07 Kingtiger Technology (Canada) Inc. System and method for testing integrated circuits by determining the solid timing window
JP5200198B1 (ja) * 2011-10-03 2013-05-15 パナソニック株式会社 動作確認支援装置および動作確認支援方法
US8724408B2 (en) 2011-11-29 2014-05-13 Kingtiger Technology (Canada) Inc. Systems and methods for testing and assembling memory modules
US9117552B2 (en) 2012-08-28 2015-08-25 Kingtiger Technology(Canada), Inc. Systems and methods for testing memory
US9501592B1 (en) 2013-03-15 2016-11-22 Cadence Design Systems, Inc. Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language
US8949753B1 (en) 2013-03-15 2015-02-03 Cadence Design Systems, Inc. Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language
US8732630B1 (en) * 2013-03-15 2014-05-20 Cadence Design Systems, Inc. Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language

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US4122995A (en) * 1977-08-02 1978-10-31 Burroughs Corporation Asynchronous digital circuit testing system
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US4230986A (en) * 1978-12-18 1980-10-28 Ncr Corporation Apparatus for facilitating the servicing of printed circuit boards
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US4290015A (en) * 1979-10-18 1981-09-15 Fairchild Camera & Instrument Corp. Electrical validator for a printed circuit board test fixture and a method of validation thereof

Also Published As

Publication number Publication date
US4484329A (en) 1984-11-20
CA1163721A (en) 1984-03-13
JPS5760269A (en) 1982-04-12
EP0046404A1 (de) 1982-02-24
EP0046404B1 (de) 1985-08-14
DE3171811D1 (en) 1985-09-19

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