JPS574559A - Testing method of integrated circuit - Google Patents
Testing method of integrated circuitInfo
- Publication number
- JPS574559A JPS574559A JP7798980A JP7798980A JPS574559A JP S574559 A JPS574559 A JP S574559A JP 7798980 A JP7798980 A JP 7798980A JP 7798980 A JP7798980 A JP 7798980A JP S574559 A JPS574559 A JP S574559A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuits
- pattern information
- testing device
- terminals
- measured
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To test a plurality of integrated circuits at the same time in the case the number of terminals of the integrated circuit to be tested is fewer than the number of the measuring terminals of a testing device, by connecting a plurality of the integrated circuits to the testing device, and giving the same input and output pattern information train. CONSTITUTION:Two integrated circuits 1 and 2 to be measured having m number of terminals to be measured are connected to the testing device 5 having n number of measuring terminals via connecting lines 3 and 4. In the testing device 5, the same input and output pattern information train is given to the measuring terminals from number 1 to number m and the measuring terminals from number m+1 to number n. Then the input and output test pattern information train is applied from the test device 5 to the integrated circuits 1 and 2 to be measured and the quality of output pattern information train therefrom is judged. Thus, a plurality of the integrated circuits can be tested at the same time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7798980A JPS574559A (en) | 1980-06-10 | 1980-06-10 | Testing method of integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7798980A JPS574559A (en) | 1980-06-10 | 1980-06-10 | Testing method of integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS574559A true JPS574559A (en) | 1982-01-11 |
Family
ID=13649237
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7798980A Pending JPS574559A (en) | 1980-06-10 | 1980-06-10 | Testing method of integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS574559A (en) |
-
1980
- 1980-06-10 JP JP7798980A patent/JPS574559A/en active Pending
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