NO20050280L - Rekkedekoderkrets for bruk i programmering av en minneanordning - Google Patents
Rekkedekoderkrets for bruk i programmering av en minneanordningInfo
- Publication number
- NO20050280L NO20050280L NO20050280A NO20050280A NO20050280L NO 20050280 L NO20050280 L NO 20050280L NO 20050280 A NO20050280 A NO 20050280A NO 20050280 A NO20050280 A NO 20050280A NO 20050280 L NO20050280 L NO 20050280L
- Authority
- NO
- Norway
- Prior art keywords
- programming
- memory cell
- read
- verify
- memory device
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
Abstract
En rekkedekoderkrets (14) for bruk ved programmering av en minneanordning. Rekkedekoderkretsen inkluderer et middel (13) for valg av ordlinjen for en miimecelle som skal programmeres og en ordlinje for en miimecelle som skal programmeres og en ordlinjedriverkrets (100) som svitsjer (15, 19) mellom en første spenningsforsyningslinje (18) som leverer en programmeringsspeiming (Vprogram) og en andre spenningsforsyningslinje (16) som leverer en les/verifiseringsspeiming (Vverify) for å skaffe til veie enten programmeringsspeimingen eller les/verifiseringsspeimingen til porten for en valgt miimecelle på ordlinjen (17). Denne svitsjing mellom programmering og les/verifiseringsspeiming resulterer i programmeringspulser som blir brukt for å pro- grammere den valgte miimecelle. Den foreliggende oppfinnelse mottar kortere programmeringspulser og gir raskere hastighet samlet sett ved programmering av miimecelle.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/174,632 US6621745B1 (en) | 2002-06-18 | 2002-06-18 | Row decoder circuit for use in programming a memory device |
PCT/US2003/011463 WO2003107353A1 (en) | 2002-06-18 | 2003-04-14 | Row decoder circuit for use in programming a memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
NO20050280L true NO20050280L (no) | 2005-01-18 |
Family
ID=27804700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO20050280A NO20050280L (no) | 2002-06-18 | 2005-01-18 | Rekkedekoderkrets for bruk i programmering av en minneanordning |
Country Status (9)
Country | Link |
---|---|
US (1) | US6621745B1 (no) |
EP (1) | EP1532634A4 (no) |
JP (1) | JP2005530298A (no) |
CN (1) | CN100424785C (no) |
AU (1) | AU2003224967A1 (no) |
CA (1) | CA2489766A1 (no) |
NO (1) | NO20050280L (no) |
TW (1) | TWI238417B (no) |
WO (1) | WO2003107353A1 (no) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4503809B2 (ja) * | 2000-10-31 | 2010-07-14 | 株式会社東芝 | 半導体記憶装置 |
JP3965287B2 (ja) * | 2001-10-09 | 2007-08-29 | シャープ株式会社 | 不揮発性半導体記憶装置およびその書き込み時間決定方法 |
US7319616B2 (en) * | 2003-11-13 | 2008-01-15 | Intel Corporation | Negatively biasing deselected memory cells |
JP2006059490A (ja) * | 2004-08-23 | 2006-03-02 | Toshiba Corp | 半導体記憶装置 |
US7345946B1 (en) * | 2004-09-24 | 2008-03-18 | Cypress Semiconductor Corporation | Dual-voltage wordline drive circuit with two stage discharge |
US7289351B1 (en) * | 2005-06-24 | 2007-10-30 | Spansion Llc | Method of programming a resistive memory device |
US8279704B2 (en) * | 2006-07-31 | 2012-10-02 | Sandisk 3D Llc | Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same |
US7525869B2 (en) * | 2006-12-31 | 2009-04-28 | Sandisk 3D Llc | Method for using a reversible polarity decoder circuit |
KR101376213B1 (ko) * | 2006-12-31 | 2014-03-21 | 쌘디스크 3디 엘엘씨 | 반전 가능 극성 디코더 회로 및 관련 방법 |
US7542370B2 (en) * | 2006-12-31 | 2009-06-02 | Sandisk 3D Llc | Reversible polarity decoder circuit |
US8301912B2 (en) * | 2007-12-31 | 2012-10-30 | Sandisk Technologies Inc. | System, method and memory device providing data scrambling compatible with on-chip copy operation |
US7916544B2 (en) | 2008-01-25 | 2011-03-29 | Micron Technology, Inc. | Random telegraph signal noise reduction scheme for semiconductor memories |
US7796436B2 (en) * | 2008-07-03 | 2010-09-14 | Macronix International Co., Ltd. | Reading method for MLC memory and reading circuit using the same |
US8139426B2 (en) * | 2008-08-15 | 2012-03-20 | Qualcomm Incorporated | Dual power scheme in memory circuit |
TWI399758B (zh) * | 2009-01-23 | 2013-06-21 | Elite Semiconductor Esmt | 字線解碼器電路 |
US8837226B2 (en) * | 2011-11-01 | 2014-09-16 | Apple Inc. | Memory including a reduced leakage wordline driver |
CN103730157A (zh) * | 2012-10-12 | 2014-04-16 | 上海华虹集成电路有限责任公司 | 用于Flash EEPROM的字线驱动电路 |
US8737137B1 (en) | 2013-01-22 | 2014-05-27 | Freescale Semiconductor, Inc. | Flash memory with bias voltage for word line/row driver |
US9224486B1 (en) | 2014-06-20 | 2015-12-29 | Freescale Semiconductor, Inc. | Control gate driver for use with split gate memory cells |
US9431111B2 (en) * | 2014-07-08 | 2016-08-30 | Ememory Technology Inc. | One time programming memory cell, array structure and operating method thereof |
US9449703B1 (en) | 2015-06-09 | 2016-09-20 | Freescale Semiconductor, Inc. | Systems and methods for driving a control gate with a select gate signal in a split-gate nonvolatile memory cell |
US9847133B2 (en) * | 2016-01-19 | 2017-12-19 | Ememory Technology Inc. | Memory array capable of performing byte erase operation |
CN107481748B (zh) * | 2016-06-07 | 2020-06-05 | 中芯国际集成电路制造(上海)有限公司 | 一种字线电压生成电路、半导体器件及电子装置 |
CN106158022B (zh) * | 2016-07-22 | 2019-12-24 | 上海华力微电子有限公司 | 一种用于共源架构嵌入式闪存的字线驱动电路及其方法 |
US11114148B1 (en) * | 2020-04-16 | 2021-09-07 | Wuxi Petabyte Technologies Co., Ltd. | Efficient ferroelectric random-access memory wordline driver, decoder, and related circuits |
JP7512702B2 (ja) * | 2020-06-19 | 2024-07-09 | Toppanホールディングス株式会社 | シフトレジスタ、及び表示装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3737525B2 (ja) * | 1994-03-11 | 2006-01-18 | 株式会社東芝 | 半導体記憶装置 |
US5694356A (en) * | 1994-11-02 | 1997-12-02 | Invoice Technology, Inc. | High resolution analog storage EPROM and flash EPROM |
JPH09161476A (ja) * | 1995-10-04 | 1997-06-20 | Toshiba Corp | 半導体メモリ及びそのテスト回路、並びにデ−タ転送システム |
KR0172401B1 (ko) * | 1995-12-07 | 1999-03-30 | 김광호 | 다수상태 불휘발성 반도체 메모리 장치 |
DE19612456C2 (de) * | 1996-03-28 | 2000-09-28 | Siemens Ag | Halbleiterspeichervorrichtung |
US5901086A (en) * | 1996-12-26 | 1999-05-04 | Motorola, Inc. | Pipelined fast-access floating gate memory architecture and method of operation |
JPH1153891A (ja) * | 1997-08-05 | 1999-02-26 | Oki Micro Design Miyazaki:Kk | 半導体記憶装置 |
US5978277A (en) | 1998-04-06 | 1999-11-02 | Aplus Flash Technology, Inc. | Bias condition and X-decoder circuit of flash memory array |
JPH11317085A (ja) | 1998-05-08 | 1999-11-16 | Sony Corp | プログラム・ベリファイ回路及びプログラム・ベリファイ方法 |
EP0961288B1 (en) * | 1998-05-29 | 2004-05-19 | STMicroelectronics S.r.l. | Monolithically integrated selector for electrically programmable memory cells devices |
EP1061525B1 (en) | 1999-06-17 | 2006-03-08 | STMicroelectronics S.r.l. | Row decoder for a nonvolatile memory with possibility of selectively biasing word lines to positive or negative voltages |
JP3776307B2 (ja) * | 2000-04-26 | 2006-05-17 | 沖電気工業株式会社 | 不揮発性メモリアナログ電圧書き込み回路 |
-
2002
- 2002-06-18 US US10/174,632 patent/US6621745B1/en not_active Expired - Lifetime
-
2003
- 2003-04-14 WO PCT/US2003/011463 patent/WO2003107353A1/en active Application Filing
- 2003-04-14 CN CNB038195615A patent/CN100424785C/zh not_active Expired - Lifetime
- 2003-04-14 AU AU2003224967A patent/AU2003224967A1/en not_active Abandoned
- 2003-04-14 EP EP03721664A patent/EP1532634A4/en not_active Withdrawn
- 2003-04-14 JP JP2004514083A patent/JP2005530298A/ja not_active Withdrawn
- 2003-04-14 CA CA002489766A patent/CA2489766A1/en not_active Abandoned
- 2003-05-12 TW TW092112834A patent/TWI238417B/zh not_active IP Right Cessation
-
2005
- 2005-01-18 NO NO20050280A patent/NO20050280L/no not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
EP1532634A4 (en) | 2006-05-10 |
WO2003107353A1 (en) | 2003-12-24 |
US6621745B1 (en) | 2003-09-16 |
CN100424785C (zh) | 2008-10-08 |
EP1532634A1 (en) | 2005-05-25 |
CN1675718A (zh) | 2005-09-28 |
JP2005530298A (ja) | 2005-10-06 |
TW200400517A (en) | 2004-01-01 |
TWI238417B (en) | 2005-08-21 |
AU2003224967A1 (en) | 2003-12-31 |
CA2489766A1 (en) | 2003-12-24 |
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Legal Events
Date | Code | Title | Description |
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FC2A | Withdrawal, rejection or dismissal of laid open patent application |