NO20034233L - Uavhengig asynkron startblokk for synkrone ikke-volative minneinnretninger - Google Patents

Uavhengig asynkron startblokk for synkrone ikke-volative minneinnretninger

Info

Publication number
NO20034233L
NO20034233L NO20034233A NO20034233A NO20034233L NO 20034233 L NO20034233 L NO 20034233L NO 20034233 A NO20034233 A NO 20034233A NO 20034233 A NO20034233 A NO 20034233A NO 20034233 L NO20034233 L NO 20034233L
Authority
NO
Norway
Prior art keywords
volatile memory
memory devices
start block
synchronous non
asynchronous start
Prior art date
Application number
NO20034233A
Other languages
English (en)
Norwegian (no)
Other versions
NO20034233D0 (no
Inventor
Dirk R Franklin
Edward S Hui
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of NO20034233L publication Critical patent/NO20034233L/no
Publication of NO20034233D0 publication Critical patent/NO20034233D0/no

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/32Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
NO20034233A 2001-03-23 2003-09-23 Uavhengig asynkron startblokk for synkrone ikke-volative minneinnretninger NO20034233D0 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/816,801 US6400611B1 (en) 2001-03-23 2001-03-23 Independent asynchronous boot block for synchronous non-volatile memory devices
PCT/US2001/049013 WO2002078008A2 (en) 2001-03-23 2001-12-19 Independent asynchronous boot block for synchronous non-volatile memory devices

Publications (2)

Publication Number Publication Date
NO20034233L true NO20034233L (no) 2003-09-23
NO20034233D0 NO20034233D0 (no) 2003-09-23

Family

ID=25221638

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20034233A NO20034233D0 (no) 2001-03-23 2003-09-23 Uavhengig asynkron startblokk for synkrone ikke-volative minneinnretninger

Country Status (10)

Country Link
US (1) US6400611B1 (ja)
EP (1) EP1423848B1 (ja)
JP (1) JP2005503631A (ja)
KR (1) KR20030085046A (ja)
CN (1) CN100426419C (ja)
AU (1) AU2002231014A1 (ja)
CA (1) CA2441898A1 (ja)
DE (1) DE60128408T2 (ja)
NO (1) NO20034233D0 (ja)
WO (1) WO2002078008A2 (ja)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100305033B1 (ko) * 1999-06-24 2001-11-14 윤종용 블럭 아키텍츄어 옵션 회로를 구비하는 불휘발성 반도체 메모리 장치
US7257703B2 (en) * 2003-11-18 2007-08-14 Toshiba America Electronic Components, Inc. Bootable NAND flash memory architecture
US20100122017A1 (en) * 2007-03-28 2010-05-13 Masayuki Toyama Memory controller, non-volatile memory system, and host device
JP2010044822A (ja) * 2008-08-12 2010-02-25 Toppan Printing Co Ltd 半導体メモリ
US8375241B2 (en) * 2009-04-02 2013-02-12 Intel Corporation Method and system to improve the operations of a registered memory module
KR101113188B1 (ko) 2010-09-30 2012-02-16 주식회사 하이닉스반도체 동작 속도가 가변되는 비휘발성 메모리 장치 및 이를 위한 상보신호 제어 방법
US8570827B2 (en) * 2010-12-20 2013-10-29 Apple Inc. Physical organization of memory to reduce power consumption
US20140089573A1 (en) * 2012-09-24 2014-03-27 Palsamy Sakthikumar Method for accessing memory devices prior to bus training
CN105355229A (zh) * 2015-10-29 2016-02-24 同济大学 异步电路系统对同步随机存储器的写入电路和读取电路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5197034A (en) 1991-05-10 1993-03-23 Intel Corporation Floating gate non-volatile memory with deep power down and write lock-out
JPH06119230A (ja) 1992-10-06 1994-04-28 Fujitsu Ltd 半導体記憶装置
US5696917A (en) 1994-06-03 1997-12-09 Intel Corporation Method and apparatus for performing burst read operations in an asynchronous nonvolatile memory
US5502835A (en) 1994-08-31 1996-03-26 Motorola, Inc. Method for synchronously accessing memory
US6097211A (en) * 1996-07-18 2000-08-01 Altera Corporation Configuration memory integrated circuit
JP4060442B2 (ja) * 1998-05-28 2008-03-12 富士通株式会社 メモリデバイス
DE19917940A1 (de) * 1999-04-21 2000-10-26 Bosch Gmbh Robert Speicherbauteil einer Rechnereinheit

Also Published As

Publication number Publication date
CA2441898A1 (en) 2002-10-03
CN1539148A (zh) 2004-10-20
WO2002078008A2 (en) 2002-10-03
CN100426419C (zh) 2008-10-15
DE60128408T2 (de) 2008-01-10
JP2005503631A (ja) 2005-02-03
KR20030085046A (ko) 2003-11-01
NO20034233D0 (no) 2003-09-23
WO2002078008A3 (en) 2004-03-25
EP1423848B1 (en) 2007-05-09
DE60128408D1 (de) 2007-06-21
EP1423848A2 (en) 2004-06-02
AU2002231014A1 (en) 2002-10-08
US6400611B1 (en) 2002-06-04

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application