NL9100725A - Werkwijze ter vervaardiging van supergeleidende geintegreerde schakelingen. - Google Patents

Werkwijze ter vervaardiging van supergeleidende geintegreerde schakelingen. Download PDF

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Publication number
NL9100725A
NL9100725A NL9100725A NL9100725A NL9100725A NL 9100725 A NL9100725 A NL 9100725A NL 9100725 A NL9100725 A NL 9100725A NL 9100725 A NL9100725 A NL 9100725A NL 9100725 A NL9100725 A NL 9100725A
Authority
NL
Netherlands
Prior art keywords
superconducting
layer
substrate
integrated circuits
oxygen
Prior art date
Application number
NL9100725A
Other languages
English (en)
Dutch (nl)
Original Assignee
Samsung Electro Mech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electro Mech filed Critical Samsung Electro Mech
Publication of NL9100725A publication Critical patent/NL9100725A/nl

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0661Processes performed after copper oxide formation, e.g. patterning
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/80Constructional details
    • H10N60/85Superconducting active materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/70High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701Coated or thin film device, i.e. active or passive
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/725Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/728Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00Superconductor technology: apparatus, material, process
    • Y10S505/725Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/742Annealing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
NL9100725A 1990-04-27 1991-04-26 Werkwijze ter vervaardiging van supergeleidende geintegreerde schakelingen. NL9100725A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019900005997A KR930004024B1 (ko) 1990-04-27 1990-04-27 초전도 집적회로소자의 제조방법
KR900005997 1990-04-27

Publications (1)

Publication Number Publication Date
NL9100725A true NL9100725A (nl) 1991-11-18

Family

ID=19298462

Family Applications (1)

Application Number Title Priority Date Filing Date
NL9100725A NL9100725A (nl) 1990-04-27 1991-04-26 Werkwijze ter vervaardiging van supergeleidende geintegreerde schakelingen.

Country Status (7)

Country Link
US (1) US5219830A (ko)
JP (1) JP2614942B2 (ko)
KR (1) KR930004024B1 (ko)
DE (1) DE4040053A1 (ko)
FR (1) FR2661557B1 (ko)
GB (1) GB2244882B (ko)
NL (1) NL9100725A (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05251777A (ja) * 1991-12-13 1993-09-28 Sumitomo Electric Ind Ltd 超電導電界効果型素子およびその作製方法
US7068618B2 (en) 2001-08-10 2006-06-27 Interdigital Technology Corp. Dynamic link adaption for time division duplex (TDD)

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3850580T2 (de) * 1987-01-30 1994-10-27 Hitachi Ltd Supraleiteranordnung.
JPH0638525B2 (ja) * 1987-05-06 1994-05-18 株式会社半導体エネルギ−研究所 超電導装置の作製方法
CA1328242C (en) * 1987-05-18 1994-04-05 Nobuhiko Fujita Process for manufacturing a superconductor and a method for producing a superconducting circuit
US5041420A (en) * 1987-06-26 1991-08-20 Hewlett-Packard Company Method for making superconductor films from organometallic precursors
DK160382C (da) * 1987-09-22 1991-08-12 Ib Johannsen Fremgangsmaade til tilvejebringelse af et elektrisk kredsloeb indeholdende josephson dioder
JP2707499B2 (ja) * 1987-11-26 1998-01-28 住友電気工業株式会社 酸化物超電導体の製造方法
JPH01160888A (ja) * 1987-12-15 1989-06-23 Mitsubishi Electric Corp ビームを用いた局部熱処理方法
NL8703039A (nl) * 1987-12-16 1989-07-17 Philips Nv Werkwijze voor het patroonmatig vervaardigen van een dunne laag uit een oxidisch supergeleidend materiaal.
US4939308A (en) * 1988-04-29 1990-07-03 Allied-Signal Inc. Method of forming crystallite-oriented superconducting ceramics by electrodeposition and thin film superconducting ceramic made thereby
JPH0354875A (ja) * 1989-07-24 1991-03-08 Furukawa Electric Co Ltd:The 超電導体回路の形成方法

Also Published As

Publication number Publication date
FR2661557B1 (fr) 1995-10-13
GB9108001D0 (en) 1991-06-05
JP2614942B2 (ja) 1997-05-28
GB2244882B (en) 1994-12-21
JPH04226089A (ja) 1992-08-14
US5219830A (en) 1993-06-15
DE4040053A1 (de) 1991-10-31
FR2661557A1 (fr) 1991-10-31
KR910019170A (ko) 1991-11-30
KR930004024B1 (ko) 1993-05-19
GB2244882A (en) 1991-12-11

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Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BC A request for examination has been filed
BN A decision not to publish the application has become irrevocable