NL7601576A - Werkwijze voor het maken van een halfgeleider- -inrichting. - Google Patents

Werkwijze voor het maken van een halfgeleider- -inrichting.

Info

Publication number
NL7601576A
NL7601576A NL7601576A NL7601576A NL7601576A NL 7601576 A NL7601576 A NL 7601576A NL 7601576 A NL7601576 A NL 7601576A NL 7601576 A NL7601576 A NL 7601576A NL 7601576 A NL7601576 A NL 7601576A
Authority
NL
Netherlands
Prior art keywords
making
semiconductor device
semiconductor
Prior art date
Application number
NL7601576A
Other languages
English (en)
Other versions
NL186048B (nl
NL186048C (nl
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of NL7601576A publication Critical patent/NL7601576A/nl
Publication of NL186048B publication Critical patent/NL186048B/nl
Application granted granted Critical
Publication of NL186048C publication Critical patent/NL186048C/nl

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/945Special, e.g. metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
NLAANVRAGE7601576,A 1975-02-15 1976-02-16 Werkwijze voor het vervaardigen van een halfgeleiderinrichting met twee passiveringslagen. NL186048C (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50019353A JPS5193874A (en) 1975-02-15 1975-02-15 Handotaisochino seizohoho

Publications (3)

Publication Number Publication Date
NL7601576A true NL7601576A (nl) 1976-08-17
NL186048B NL186048B (nl) 1990-04-02
NL186048C NL186048C (nl) 1990-09-03

Family

ID=11997006

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7601576,A NL186048C (nl) 1975-02-15 1976-02-16 Werkwijze voor het vervaardigen van een halfgeleiderinrichting met twee passiveringslagen.

Country Status (8)

Country Link
US (1) US4062707A (nl)
JP (1) JPS5193874A (nl)
AU (1) AU499549B2 (nl)
CA (1) CA1059243A (nl)
DE (1) DE2605830C3 (nl)
FR (1) FR2301092A1 (nl)
GB (1) GB1513332A (nl)
NL (1) NL186048C (nl)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4161744A (en) * 1977-05-23 1979-07-17 Varo Semiconductor, Inc. Passivated semiconductor device and method of making same
US4134125A (en) * 1977-07-20 1979-01-09 Bell Telephone Laboratories, Incorporated Passivation of metallized semiconductor substrates
US4149307A (en) * 1977-12-28 1979-04-17 Hughes Aircraft Company Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
US4148133A (en) * 1978-05-08 1979-04-10 Sperry Rand Corporation Polysilicon mask for etching thick insulator
US4174252A (en) * 1978-07-26 1979-11-13 Rca Corporation Method of defining contact openings in insulating layers on semiconductor devices without the formation of undesirable pinholes
US4219379A (en) * 1978-09-25 1980-08-26 Mostek Corporation Method for making a semiconductor device
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
JPS5640269A (en) * 1979-09-11 1981-04-16 Toshiba Corp Preparation of semiconductor device
US4317690A (en) * 1980-06-18 1982-03-02 Signetics Corporation Self-aligned double polysilicon MOS fabrication
JPS58100441A (ja) * 1981-12-10 1983-06-15 Toshiba Corp 半導体装置の製造方法
US4894703A (en) * 1982-03-19 1990-01-16 American Telephone And Telegraph Company, At&T Bell Laboratories Restricted contact, planar photodiode
US4990989A (en) * 1982-03-19 1991-02-05 At&T Bell Laboratories Restricted contact planar photodiode
US4634474A (en) * 1984-10-09 1987-01-06 At&T Bell Laboratories Coating of III-V and II-VI compound semiconductors
JPS61222172A (ja) * 1985-03-15 1986-10-02 Sharp Corp Mosfetのゲ−ト絶縁膜形成方法
US4714518A (en) * 1987-01-14 1987-12-22 Polaroid Corporation Dual layer encapsulation coating for III-V semiconductor compounds
US5460983A (en) * 1993-07-30 1995-10-24 Sgs-Thomson Microelectronics, Inc. Method for forming isolated intra-polycrystalline silicon structures
DE4424420A1 (de) * 1994-07-12 1996-01-18 Telefunken Microelectron Kontaktierungsprozeß
US6068928A (en) * 1998-02-25 2000-05-30 Siemens Aktiengesellschaft Method for producing a polycrystalline silicon structure and polycrystalline silicon layer to be produced by the method
DE69923436T2 (de) * 1998-03-06 2006-01-05 Asm America Inc., Phoenix Verfahren zum beschichten von silizium mit hoher kantenabdeckung
DE60005541T2 (de) * 2000-12-20 2004-07-01 Stmicroelectronics S.R.L., Agrate Brianza Verfahren zur Kontrollierung von Zwischenoxyd bei einer monokristallinischen/polykristallinischen Silizium-Zwischenschicht
US9443730B2 (en) 2014-07-18 2016-09-13 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US9837271B2 (en) 2014-07-18 2017-12-05 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US10460932B2 (en) 2017-03-31 2019-10-29 Asm Ip Holding B.V. Semiconductor device with amorphous silicon filled gaps and methods for forming
KR102591247B1 (ko) * 2023-04-13 2023-10-19 삼성엔지니어링 주식회사 한쌍의 마스트를 이용한 대용량 건설용 리프트와 로드 셀을 이용한 건설용 리프트 장치

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2789258A (en) * 1955-06-29 1957-04-16 Raytheon Mfg Co Intrinsic coatings for semiconductor junctions
NL251064A (nl) * 1955-11-04
GB1053046A (nl) * 1963-02-25 1900-01-01
NL6504750A (nl) * 1964-04-15 1965-10-18
GB1104935A (en) * 1964-05-08 1968-03-06 Standard Telephones Cables Ltd Improvements in or relating to a method of forming a layer of an inorganic compound
SE300472B (nl) * 1965-03-31 1968-04-29 Asea Ab
US3479237A (en) * 1966-04-08 1969-11-18 Bell Telephone Labor Inc Etch masks on semiconductor surfaces
US3422321A (en) * 1966-06-20 1969-01-14 Sperry Rand Corp Oxygenated silicon nitride semiconductor devices and silane method for making same
US3463715A (en) * 1966-07-07 1969-08-26 Trw Inc Method of cathodically sputtering a layer of silicon having a reduced resistivity
US3455020A (en) * 1966-10-13 1969-07-15 Rca Corp Method of fabricating insulated-gate field-effect devices
US3472689A (en) * 1967-01-19 1969-10-14 Rca Corp Vapor deposition of silicon-nitrogen insulating coatings
US3537921A (en) * 1967-02-28 1970-11-03 Motorola Inc Selective hydrofluoric acid etching and subsequent processing
DE1614455C3 (de) * 1967-03-16 1979-07-19 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen einer teils aus Siliciumoxid, teils aus Siliciumnitrid bestehenden Schutzschicht an der Oberfläche eines Halbleiterkörpers
US3475234A (en) * 1967-03-27 1969-10-28 Bell Telephone Labor Inc Method for making mis structures
US3549411A (en) * 1967-06-27 1970-12-22 Texas Instruments Inc Method of preparing silicon nitride films
GB1244013A (en) * 1967-10-13 1971-08-25 Gen Electric Fabrication of semiconductor devices
GB1239852A (en) * 1969-01-09 1971-07-21 Ferranti Ltd Improvements relating to semiconductor devices
JPS497870B1 (nl) * 1969-06-06 1974-02-22
JPS5314420B2 (nl) * 1973-05-14 1978-05-17
JPS523277B2 (nl) * 1973-05-19 1977-01-27
US3862852A (en) * 1973-06-01 1975-01-28 Fairchild Camera Instr Co Method of obtaining high-quality thick films of polycrystalline silicone from dielectric isolation
JPS532552B2 (nl) 1974-03-30 1978-01-28

Also Published As

Publication number Publication date
FR2301092B1 (nl) 1982-06-18
JPS5193874A (en) 1976-08-17
DE2605830B2 (de) 1980-11-06
DE2605830A1 (de) 1976-09-02
AU1084076A (en) 1977-08-11
NL186048B (nl) 1990-04-02
NL186048C (nl) 1990-09-03
US4062707A (en) 1977-12-13
FR2301092A1 (fr) 1976-09-10
DE2605830C3 (de) 1983-01-05
AU499549B2 (en) 1979-04-26
CA1059243A (en) 1979-07-24
GB1513332A (en) 1978-06-07

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Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
BC A request for examination has been filed
A85 Still pending on 85-01-01
V1 Lapsed because of non-payment of the annual fee

Effective date: 19950901