NL194354C - Werkwijze voor het vervaardigen van een monolitische ge´ntegreerde schakeling met ten minste ÚÚn CMOS-veldeffecttransistor en ÚÚn bipolaire npn-transistor. - Google Patents
Werkwijze voor het vervaardigen van een monolitische ge´ntegreerde schakeling met ten minste ÚÚn CMOS-veldeffecttransistor en ÚÚn bipolaire npn-transistor. Download PDFInfo
- Publication number
- NL194354C NL194354C NL9400337A NL9400337A NL194354C NL 194354 C NL194354 C NL 194354C NL 9400337 A NL9400337 A NL 9400337A NL 9400337 A NL9400337 A NL 9400337A NL 194354 C NL194354 C NL 194354C
- Authority
- NL
- Netherlands
- Prior art keywords
- base
- polysilicon layer
- layer
- region
- subsequently
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 34
- 230000005669 field effect Effects 0.000 title claims description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 24
- 229920005591 polysilicon Polymers 0.000 claims description 24
- 229920002120 photoresistant polymer Polymers 0.000 claims description 13
- 229910052796 boron Inorganic materials 0.000 claims description 11
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910021341 titanium silicide Inorganic materials 0.000 claims description 4
- 230000007704 transition Effects 0.000 claims description 4
- 229910052785 arsenic Inorganic materials 0.000 claims description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 3
- 238000002513 implantation Methods 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 229910052698 phosphorus Inorganic materials 0.000 claims description 2
- 239000011574 phosphorus Substances 0.000 claims description 2
- 125000006850 spacer group Chemical group 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- -1 boron ions Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000003631 wet chemical etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4306932 | 1993-03-05 | ||
| DE4306932 | 1993-03-05 | ||
| DE4319437 | 1993-06-11 | ||
| DE4319437A DE4319437C1 (de) | 1993-03-05 | 1993-06-11 | Verfahren zur Herstellung einer monolithisch integrierten Schaltung mit mindestens einem CMOS-Feldeffekttransistor und einem npn-Bipolar-Transistor |
| US08/371,756 US5525825A (en) | 1993-03-05 | 1995-01-12 | Monolithic integrated circuit with at least one CMOS field-effect transistor and one npn bipolar transistor |
| US37175695 | 1995-01-12 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| NL9400337A NL9400337A (nl) | 1994-10-03 |
| NL194354B NL194354B (nl) | 2001-09-03 |
| NL194354C true NL194354C (nl) | 2002-01-04 |
Family
ID=27204834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL9400337A NL194354C (nl) | 1993-03-05 | 1994-03-04 | Werkwijze voor het vervaardigen van een monolitische ge´ntegreerde schakeling met ten minste ÚÚn CMOS-veldeffecttransistor en ÚÚn bipolaire npn-transistor. |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP3426327B2 (fr) |
| FR (1) | FR2702307B1 (fr) |
| NL (1) | NL194354C (fr) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0270703B1 (fr) * | 1986-12-12 | 1991-12-18 | Deutsche ITT Industries GmbH | Procédé de fabrication d'un circuit intégré monolithique comprenant au moins un transistor bipolaire plan |
| EP0325181B1 (fr) * | 1988-01-19 | 1995-04-05 | National Semiconductor Corporation | Procédé pour fabriquer un émetteur en polysilicium et une grille en polysilicium utilisant la même gravure de polysilicium sur un oxyde à grille mince |
-
1994
- 1994-02-25 FR FR9402213A patent/FR2702307B1/fr not_active Expired - Fee Related
- 1994-03-04 NL NL9400337A patent/NL194354C/nl not_active IP Right Cessation
- 1994-03-07 JP JP03611594A patent/JP3426327B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| FR2702307A1 (fr) | 1994-09-09 |
| NL9400337A (nl) | 1994-10-03 |
| JPH0758227A (ja) | 1995-03-03 |
| NL194354B (nl) | 2001-09-03 |
| FR2702307B1 (fr) | 1995-08-18 |
| JP3426327B2 (ja) | 2003-07-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| BC | A request for examination has been filed | ||
| DNT | Communications of changes of names of applicants whose applications have been laid open to public inspection |
Free format text: MICRONAS INTERMETALL GMBH |
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| DNT | Communications of changes of names of applicants whose applications have been laid open to public inspection |
Free format text: MICRONAS GMBH |
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| V1 | Lapsed because of non-payment of the annual fee |
Effective date: 20071001 |