FR2702307B1 - Procédé de fabrication d'un circuit intégré monolithique avec au moins un transistor à effet de champ CMOS et un transistor npn bipolaire. - Google Patents

Procédé de fabrication d'un circuit intégré monolithique avec au moins un transistor à effet de champ CMOS et un transistor npn bipolaire.

Info

Publication number
FR2702307B1
FR2702307B1 FR9402213A FR9402213A FR2702307B1 FR 2702307 B1 FR2702307 B1 FR 2702307B1 FR 9402213 A FR9402213 A FR 9402213A FR 9402213 A FR9402213 A FR 9402213A FR 2702307 B1 FR2702307 B1 FR 2702307B1
Authority
FR
France
Prior art keywords
manufacturing
integrated circuit
field effect
monolithic integrated
bipolar npn
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9402213A
Other languages
English (en)
Other versions
FR2702307A1 (fr
Inventor
Nagel Juergen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
Deutsche ITT Industries GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE4319437A external-priority patent/DE4319437C1/de
Application filed by Deutsche ITT Industries GmbH filed Critical Deutsche ITT Industries GmbH
Publication of FR2702307A1 publication Critical patent/FR2702307A1/fr
Application granted granted Critical
Publication of FR2702307B1 publication Critical patent/FR2702307B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
FR9402213A 1993-03-05 1994-02-25 Procédé de fabrication d'un circuit intégré monolithique avec au moins un transistor à effet de champ CMOS et un transistor npn bipolaire. Expired - Fee Related FR2702307B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4306932 1993-03-05
DE4319437A DE4319437C1 (de) 1993-03-05 1993-06-11 Verfahren zur Herstellung einer monolithisch integrierten Schaltung mit mindestens einem CMOS-Feldeffekttransistor und einem npn-Bipolar-Transistor
US08/371,756 US5525825A (en) 1993-03-05 1995-01-12 Monolithic integrated circuit with at least one CMOS field-effect transistor and one npn bipolar transistor

Publications (2)

Publication Number Publication Date
FR2702307A1 FR2702307A1 (fr) 1994-09-09
FR2702307B1 true FR2702307B1 (fr) 1995-08-18

Family

ID=27204834

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9402213A Expired - Fee Related FR2702307B1 (fr) 1993-03-05 1994-02-25 Procédé de fabrication d'un circuit intégré monolithique avec au moins un transistor à effet de champ CMOS et un transistor npn bipolaire.

Country Status (3)

Country Link
JP (1) JP3426327B2 (fr)
FR (1) FR2702307B1 (fr)
NL (1) NL194354C (fr)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0270703B1 (fr) * 1986-12-12 1991-12-18 Deutsche ITT Industries GmbH Procédé de fabrication d'un circuit intégré monolithique comprenant au moins un transistor bipolaire plan
DE68921995T2 (de) * 1988-01-19 1995-12-07 Nat Semiconductor Corp Verfahren zum Herstellen eines Polysiliciumemitters und eines Polysiliciumgates durch gleichzeitiges Ätzen von Polysilicium auf einem dünnen Gateoxid.

Also Published As

Publication number Publication date
NL194354B (nl) 2001-09-03
FR2702307A1 (fr) 1994-09-09
NL9400337A (nl) 1994-10-03
JPH0758227A (ja) 1995-03-03
NL194354C (nl) 2002-01-04
JP3426327B2 (ja) 2003-07-14

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20071030