NL1006872C2 - Methode voor het maken van een zelfrichtende silicidelaag. - Google Patents
Methode voor het maken van een zelfrichtende silicidelaag. Download PDFInfo
- Publication number
- NL1006872C2 NL1006872C2 NL1006872A NL1006872A NL1006872C2 NL 1006872 C2 NL1006872 C2 NL 1006872C2 NL 1006872 A NL1006872 A NL 1006872A NL 1006872 A NL1006872 A NL 1006872A NL 1006872 C2 NL1006872 C2 NL 1006872C2
- Authority
- NL
- Netherlands
- Prior art keywords
- layer
- insulating layer
- substrate
- metal
- regions
- Prior art date
Links
- 229910021332 silicide Inorganic materials 0.000 title claims description 30
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title claims description 29
- 238000000034 method Methods 0.000 title claims description 22
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 26
- 238000002955 isolation Methods 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 13
- 125000006850 spacer group Chemical group 0.000 claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 150000002500 ions Chemical class 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 3
- 230000008021 deposition Effects 0.000 claims 1
- 238000000059 patterning Methods 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823443—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/883,332 US5913124A (en) | 1997-05-24 | 1997-06-26 | Method of making a self-aligned silicide |
GB9716395A GB2328078B (en) | 1997-05-24 | 1997-08-01 | Method of making a self-aligned silicide |
JP09216235A JP3041369B2 (ja) | 1997-05-24 | 1997-08-11 | セルフアライン珪化物の製造方法 |
DE19734837A DE19734837B4 (de) | 1997-05-24 | 1997-08-12 | Verfahren zur Herstellung eines selbstausrichtenden Silicids |
NL1006872A NL1006872C2 (nl) | 1997-05-24 | 1997-08-28 | Methode voor het maken van een zelfrichtende silicidelaag. |
FR9711068A FR2763743B1 (fr) | 1997-05-24 | 1997-09-05 | Procede de fabrication d'un siliciure auto-aligne |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW86107014 | 1997-05-24 | ||
TW086107014A TW345694B (en) | 1997-05-24 | 1997-05-24 | Method of making a self-aligned silicide component |
GB9716395A GB2328078B (en) | 1997-05-24 | 1997-08-01 | Method of making a self-aligned silicide |
GB9716395 | 1997-08-01 | ||
NL1006872A NL1006872C2 (nl) | 1997-05-24 | 1997-08-28 | Methode voor het maken van een zelfrichtende silicidelaag. |
NL1006872 | 1997-08-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
NL1006872C2 true NL1006872C2 (nl) | 1999-03-02 |
Family
ID=27268962
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL1006872A NL1006872C2 (nl) | 1997-05-24 | 1997-08-28 | Methode voor het maken van een zelfrichtende silicidelaag. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5913124A (fr) |
JP (1) | JP3041369B2 (fr) |
DE (1) | DE19734837B4 (fr) |
FR (1) | FR2763743B1 (fr) |
GB (1) | GB2328078B (fr) |
NL (1) | NL1006872C2 (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6187643B1 (en) * | 1999-06-29 | 2001-02-13 | Varian Semiconductor Equipment Associates, Inc. | Simplified semiconductor device manufacturing using low energy high tilt angle and high energy post-gate ion implantation (PoGI) |
US6509264B1 (en) | 2000-03-30 | 2003-01-21 | Chartered Semiconductor Manufacturing Ltd. | Method to form self-aligned silicide with reduced sheet resistance |
JP2007508705A (ja) * | 2003-10-17 | 2007-04-05 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 半導体装置とこの種の半導体装置の製造方法 |
JP2005183458A (ja) * | 2003-12-16 | 2005-07-07 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法及びその製造装置 |
DE102004055083B4 (de) * | 2004-11-15 | 2008-01-17 | Trw Automotive Electronics & Components Gmbh & Co. Kg | Schweißteil für das Verschweißen mittels einer Kehlnaht und elektrische Baueinheit |
US7442619B2 (en) * | 2006-05-18 | 2008-10-28 | International Business Machines Corporation | Method of forming substantially L-shaped silicide contact for a semiconductor device |
US8338265B2 (en) * | 2008-11-12 | 2012-12-25 | International Business Machines Corporation | Silicided trench contact to buried conductive layer |
US8664050B2 (en) * | 2012-03-20 | 2014-03-04 | International Business Machines Corporation | Structure and method to improve ETSOI MOSFETS with back gate |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4512073A (en) * | 1984-02-23 | 1985-04-23 | Rca Corporation | Method of forming self-aligned contact openings |
JPH05166798A (ja) * | 1991-12-18 | 1993-07-02 | Sony Corp | 半導体装置の素子分離領域の形成方法 |
EP0756320A2 (fr) * | 1995-07-27 | 1997-01-29 | Matsushita Electric Industrial Co., Ltd. | Dispositif semi-conducteur et procédé de fabrication |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5612914A (en) * | 1991-06-25 | 1997-03-18 | Texas Instruments Incorporated | Asymmetrical non-volatile memory cell, arrays and methods for fabricating same |
US5463237A (en) * | 1993-11-04 | 1995-10-31 | Victor Company Of Japan, Ltd. | MOSFET device having depletion layer |
KR950026039A (ko) * | 1994-02-25 | 1995-09-18 | 모리시다 요이치 | 반도체 장치 및 그 제조방법 |
US5576227A (en) * | 1994-11-02 | 1996-11-19 | United Microelectronics Corp. | Process for fabricating a recessed gate MOS device |
US5759901A (en) * | 1995-04-06 | 1998-06-02 | Vlsi Technology, Inc. | Fabrication method for sub-half micron CMOS transistor |
US5508212A (en) * | 1995-04-27 | 1996-04-16 | Taiwan Semiconductor Manufacturing Co. | Salicide process for a MOS semiconductor device using nitrogen implant of titanium |
US5534449A (en) * | 1995-07-17 | 1996-07-09 | Micron Technology, Inc. | Methods of forming complementary metal oxide semiconductor (CMOS) integrated circuitry |
US5814545A (en) * | 1995-10-02 | 1998-09-29 | Motorola, Inc. | Semiconductor device having a phosphorus doped PECVD film and a method of manufacture |
US5686324A (en) * | 1996-03-28 | 1997-11-11 | Mosel Vitelic, Inc. | Process for forming LDD CMOS using large-tilt-angle ion implantation |
KR100205320B1 (ko) * | 1996-10-25 | 1999-07-01 | 구본준 | 모스펫 및 그 제조방법 |
US5793090A (en) * | 1997-01-10 | 1998-08-11 | Advanced Micro Devices, Inc. | Integrated circuit having multiple LDD and/or source/drain implant steps to enhance circuit performance |
-
1997
- 1997-06-26 US US08/883,332 patent/US5913124A/en not_active Expired - Fee Related
- 1997-08-01 GB GB9716395A patent/GB2328078B/en not_active Expired - Fee Related
- 1997-08-11 JP JP09216235A patent/JP3041369B2/ja not_active Expired - Fee Related
- 1997-08-12 DE DE19734837A patent/DE19734837B4/de not_active Expired - Fee Related
- 1997-08-28 NL NL1006872A patent/NL1006872C2/nl not_active IP Right Cessation
- 1997-09-05 FR FR9711068A patent/FR2763743B1/fr not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4512073A (en) * | 1984-02-23 | 1985-04-23 | Rca Corporation | Method of forming self-aligned contact openings |
JPH05166798A (ja) * | 1991-12-18 | 1993-07-02 | Sony Corp | 半導体装置の素子分離領域の形成方法 |
EP0756320A2 (fr) * | 1995-07-27 | 1997-01-29 | Matsushita Electric Industrial Co., Ltd. | Dispositif semi-conducteur et procédé de fabrication |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 017, no. 568 (E - 1447) 14 October 1993 (1993-10-14) * |
Also Published As
Publication number | Publication date |
---|---|
DE19734837B4 (de) | 2004-04-15 |
GB2328078B (en) | 1999-07-14 |
JP3041369B2 (ja) | 2000-05-15 |
GB9716395D0 (en) | 1997-10-08 |
US5913124A (en) | 1999-06-15 |
DE19734837A1 (de) | 1998-11-26 |
FR2763743B1 (fr) | 1999-07-23 |
FR2763743A1 (fr) | 1998-11-27 |
JPH10335662A (ja) | 1998-12-18 |
GB2328078A (en) | 1999-02-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PD2B | A search report has been drawn up | ||
V1 | Lapsed because of non-payment of the annual fee |
Effective date: 20100301 |