KR970054154A

KR970054154A - Capacitor Formation Method of Semiconductor Device

Info

Publication number: KR970054154A
Application number: KR1019950069599A
Authority: KR
Inventors: 문성태
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1995-12-30
Filing date: 1995-12-30
Publication date: 1997-07-31

Abstract

본 발명은 단위 셀 면적당 정전 용량을 극대화 할 수 있는 반도체 소자의 캐패시터 형성방법을 제공하기 위한 것이다. 이와 같은 목적을 달성하기 위한 캐패시터 형성방법은 반도체 기판 상부에 게이트 산화막과 게이트 폴리실리콘이 적층된 게이트 전극을 형성하는 단계; 전면에 절연층을 소정 두께만큼 형성하여 게이트 전극 사이의 반도체 기판의 접합영역과의 전기적인 접촉을 위한 콘택홀을 형성하는 단계; 상기 콘택홀을 매립하는 폴리실리콘을 전면에 소정 두께만큼 증착하는 단계; 상기 폴리실리콘의 패턴을 형성하기 위한 감광막 마스크 패턴을 상기 폴리실리콘의 상부에 형성하는 단계; 감광막 마스크의 측벽에 폴리머를 형성하는 단게; 상기 감광막 마스크의 측벽에 형성된 폴리머를 식각 장벽으로 하여 노출된 폴리실리콘을 식각하는 단계를 포함하는 것을 특징으로 한다.The present invention is to provide a method of forming a capacitor of a semiconductor device capable of maximizing the capacitance per unit cell area. A capacitor forming method for achieving the above object comprises the steps of forming a gate electrode on which a gate oxide film and a gate polysilicon are stacked on a semiconductor substrate; Forming a contact hole for electrical contact between the gate electrode and the junction region of the semiconductor substrate by forming an insulating layer on a front surface thereof by a predetermined thickness; Depositing a polysilicon filling the contact hole on the entire surface by a predetermined thickness; Forming a photoresist mask pattern on the polysilicon to form a pattern of the polysilicon; Forming a polymer on the sidewall of the photoresist mask; And etching the exposed polysilicon using the polymer formed on the sidewall of the photoresist mask as an etch barrier.

Description

Capacitor Formation Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

첨부한 도면은 본 발명의 실시예에 따른 반도체 소자의 캐패시터 형성방법을 설명하는 공정 흐름도.The accompanying drawings are a flow chart illustrating a method of forming a capacitor of a semiconductor device according to an embodiment of the present invention.

Claims

Forming a gate electrode on which a gate oxide film and a gate polysilicon are stacked on the semiconductor substrate; Forming a contact hole for electrical contact between the gate electrode and the junction region of the semiconductor substrate by forming an insulating layer on a front surface thereof by a predetermined thickness; Depositing a polysilicon filling the contact hole on the entire surface by a predetermined thickness; Forming a photoresist mask pattern on the polysilicon to form a pattern of the polysilicon; Forming a polymer on the sidewall of the photoresist mask; And etching the exposed polysilicon by using the polymer formed on the sidewall of the photoresist mask as an etch barrier.

The method of claim 1, wherein the polymer is formed by supplying a gas for reactive ion etching of an oxide film in a state where a photosensitive film is formed.

The method of claim 2, wherein the gas is a mixed gas of CHF ₂ / CF ₄ / Ar.

※ Note: The disclosure is based on the initial application.