KR960002547A - Contact hole formation method of semiconductor device - Google Patents
Contact hole formation method of semiconductor device Download PDFInfo
- Publication number
- KR960002547A KR960002547A KR1019940012568A KR19940012568A KR960002547A KR 960002547 A KR960002547 A KR 960002547A KR 1019940012568 A KR1019940012568 A KR 1019940012568A KR 19940012568 A KR19940012568 A KR 19940012568A KR 960002547 A KR960002547 A KR 960002547A
- Authority
- KR
- South Korea
- Prior art keywords
- oxide
- forming
- contact hole
- mask
- pattern
- Prior art date
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
본 발명은 반도체소자의 콘택홀 형성방법에 관한 것으로, 반도체소자의 고집적됨에 따라 필요로하는 미세콘택홀을 형성하기 위하여, 반도체기판 상부에 하부절연층, 제1산화막 및 제2산화막을 순차적으로 증착하고 그 상부에 콘택마스크를 형성한 다음, 상기 콘택마스크를 사용하여 제2산화막패턴을 형성하고 그 상부에 제3산화막을 일정두께 증착한 다음, 이방성식각하여 제3산화막 스페이서를 형성하고 상기 제3산화막 스페이서와 제2산화막패턴을 마스크로하여 제1산화막패턴을 형성한 다음, 상기 제1산화막패턴을 식각장벽 및 마스크로 사용하여 전면식각을 실시함으로써 쿼터 마이크론 크기의 콘택홀을 형성함으로써 종래기술의 최소선폭보다 적은 미세선폭을 형성하여 반도체소자의 고집적화를 가능하게 하는 기술이다.The present invention relates to a method for forming a contact hole in a semiconductor device, in order to form a micro contact hole required as the semiconductor device is highly integrated, the lower insulating layer, the first oxide film and the second oxide film are sequentially deposited on the semiconductor substrate. And forming a contact mask on the upper side, forming a second oxide layer pattern using the contact mask, depositing a third oxide layer on the upper surface, and then anisotropically etching to form a third oxide spacer. The first oxide pattern is formed using the oxide spacer and the second oxide pattern as a mask, and then the entire surface is etched using the first oxide pattern as an etch barrier and a mask to form a contact micron-sized contact hole. It is a technology that enables high integration of semiconductor devices by forming a fine line width smaller than the minimum line width.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도 내지 제4도는 본 발명의 실시예에 의한 반도체소자의 콘택홀 형성공정을 도시한 단면도.1 to 4 are cross-sectional views showing a contact hole forming process of a semiconductor device according to an embodiment of the present invention.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940012568A KR960002547A (en) | 1994-06-03 | 1994-06-03 | Contact hole formation method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940012568A KR960002547A (en) | 1994-06-03 | 1994-06-03 | Contact hole formation method of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR960002547A true KR960002547A (en) | 1996-01-26 |
Family
ID=66686048
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940012568A KR960002547A (en) | 1994-06-03 | 1994-06-03 | Contact hole formation method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960002547A (en) |
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1994
- 1994-06-03 KR KR1019940012568A patent/KR960002547A/en not_active Application Discontinuation
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