KR970030538A - 반도체 칩 본딩방법 - Google Patents

반도체 칩 본딩방법 Download PDF

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KR970030538A
KR970030538A KR1019950042561A KR19950042561A KR970030538A KR 970030538 A KR970030538 A KR 970030538A KR 1019950042561 A KR1019950042561 A KR 1019950042561A KR 19950042561 A KR19950042561 A KR 19950042561A KR 970030538 A KR970030538 A KR 970030538A
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epoxy
semiconductor chip
substrate
bonding
wire
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KR1019950042561A
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KR0179644B1 (ko
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서성민
송재환
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황인길
아남산업주식회사
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Priority to KR1019950042561A priority Critical patent/KR0179644B1/ko
Priority to JP8243997A priority patent/JP2727443B2/ja
Priority to US08/749,578 priority patent/US5858149A/en
Publication of KR970030538A publication Critical patent/KR970030538A/ko
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Publication of KR0179644B1 publication Critical patent/KR0179644B1/ko

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    • H01L24/10Bump connectors ; Manufacturing methods related thereto
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Abstract

본 발명은 반도체 칩에 범프(Bump)를 형성하여 기판(Substrate)상에 회로부가 아래로 향하게 뒤집어 실장하는 플립 칩(Flip Chip) 본딩방법에 관한 것으로, 반도체 칩 상의 알루미늄 본드패드 위에 Au와이어 볼 본딩장비로 Au와이어 범프를 형성하는 단계와, 상기 AU와이어 범프가 형성된 반도체 칩이 부착되는 기판(Substrate) 위에 미리 온도에 따른 다단계(Step) 경화가 가능한 에폭시를 도포하여 선경화(Precure) 시키는 단계와, 상기 에폭시가 도포된 기판위에 Au와이어 범프가 형성된 반도체 칩을 뒤집어 열압착(Thermocompression) 본딩하는 단계로 이루어지는 것을 특징으로 하는 반도체 칩 본딩 방법이다.

Description

반도체 칩 본딩방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2a도 내지 제2f도는 본 발명에 따른 반도체 칩 본딩방법을 나타낸 도면.

Claims (8)

  1. 반도체 칩 상의 알루미늄 본드패드 위에 Au와이어 범프를 형성하는 단계와, 상기 Au와이어 범프가 형성된 반도체 칩이 부착되는 기판(Substrate)위에 에폭시를 도포하는 단계와, 상기 에폭시가 도포된 기판 위에 Au와이어범프가 형성된 반도체 칩을 뒤집어 열압착(Thermocompression) 본딩하는 단계로 이루어지는 것을 특징으로 하는 반도체 칩 본딩 방법.
  2. 제1항에 있어서, 상기 Au와이어 범프는Au와이어 볼 본딩 장비로 형성하는 것을 특징으로 하는 반도체 칩 본딩방법.
  3. 제1항에 있어서, 상기 기판위에 도포되는 에폭시는 다단계(Step) 경화가 가능한 에폭시를 사용하는 것을 특징으로 하는 반도체 칩 본딩방법.
  4. 제3항에 있어서, 상기 다단계(Step) 경화가 가능한 에폭시는 반도체 칩을 본딩하기 전에 미리 선경화(Precure) 시키는 것을 특징으로 하는 반도체 칩 본딩방법.
  5. 제1항에 있어서, 상기 에폭시는 경화시간과 단계를 줄이기 위하여 순간경화(Snap Cure) 에폭시를 사용하는 것을 특징으로 하는 반도체 칩 본딩방법.
  6. 제1항에 있어서, 상기 에폭시의 도포하는 단계는 에폭시가 도포되는 부분에 구멍이 형성된 스크린(Screen)을 기판 위에 놓고, 상기 구멍으로 에폭시를 도포한 후, 프린팅 블레이드로 에폭시를 밀어서 도포하는 것을 특징으로 하는 반도체 칩 본딩방법.
  7. 제1항에 있어서, 상기 에폭시의 도포는 기판의 리드핑거를 포함하여 도포되는 것을 특징으로 하는 반도체 칩 본딩방법.
  8. 제1항에 있어서, 상기 에폭시는 반도체 칩의 면적과 동일하게 하거나, 또는 반도체 칩의 면적보다 약간 크게 도포되는 것을 특징으로 하는 반도체 칩 본딩방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950042561A 1995-11-21 1995-11-21 반도체 칩 본딩방법 KR0179644B1 (ko)

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KR1019950042561A KR0179644B1 (ko) 1995-11-21 1995-11-21 반도체 칩 본딩방법
JP8243997A JP2727443B2 (ja) 1995-11-21 1996-08-28 半導体チップボンディング方法
US08/749,578 US5858149A (en) 1995-11-21 1996-11-14 Process for bonding semiconductor chip

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100704969B1 (ko) * 2005-11-28 2007-04-09 삼성전기주식회사 적외선 차단필터 본딩 장치

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6413797B2 (en) 1997-10-09 2002-07-02 Rohm Co., Ltd. Semiconductor device and method for making the same
JP3381601B2 (ja) 1998-01-26 2003-03-04 松下電器産業株式会社 バンプ付電子部品の実装方法
US6244499B1 (en) 1999-12-13 2001-06-12 Advanced Semiconductor Engineering, Inc. Structure of a ball bump for wire bonding and the formation thereof
TW456008B (en) 2000-09-28 2001-09-21 Siliconware Precision Industries Co Ltd Flip chip packaging process with no-flow underfill method
WO2002093637A2 (en) * 2001-05-17 2002-11-21 Koninklijke Philips Electronics N.V. Product comprising a substrate and a chip attached to the substrate
US6991970B2 (en) * 2001-08-30 2006-01-31 Micron Technology, Inc. Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of semiconductor device
US6841874B1 (en) 2002-11-01 2005-01-11 Amkor Technology, Inc. Wafer-level chip-scale package
TWI241697B (en) * 2005-01-06 2005-10-11 Siliconware Precision Industries Co Ltd Semiconductor package and fabrication method thereof
JP2008192725A (ja) * 2007-02-02 2008-08-21 Spansion Llc 半導体装置及びその製造方法並びに半導体装置の製造装置
CN103433171A (zh) * 2013-08-30 2013-12-11 深圳创维-Rgb电子有限公司 Led面光源的pcb的焊盘上涂覆胶粘剂的装置及方法
KR102208495B1 (ko) 2015-10-27 2021-01-27 한화정밀기계 주식회사 플립칩 본딩 장치
US10690868B1 (en) * 2018-05-29 2020-06-23 Cisco Technology, Inc. Thermal protection for modular components in a network device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5128746A (en) * 1990-09-27 1992-07-07 Motorola, Inc. Adhesive and encapsulant material with fluxing properties
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100704969B1 (ko) * 2005-11-28 2007-04-09 삼성전기주식회사 적외선 차단필터 본딩 장치

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