KR970024206A - A method for manufacturing a capacitor of a semiconductor memory device. - Google Patents

A method for manufacturing a capacitor of a semiconductor memory device. Download PDF

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Publication number
KR970024206A
KR970024206A KR1019950035293A KR19950035293A KR970024206A KR 970024206 A KR970024206 A KR 970024206A KR 1019950035293 A KR1019950035293 A KR 1019950035293A KR 19950035293 A KR19950035293 A KR 19950035293A KR 970024206 A KR970024206 A KR 970024206A
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KR
South Korea
Prior art keywords
capacitor
forming
film
insulating material
material layer
Prior art date
Application number
KR1019950035293A
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Korean (ko)
Other versions
KR0156646B1 (en
Inventor
정문모
임준희
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문정환
엘지반도체 주식회사
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Application filed by 문정환, 엘지반도체 주식회사 filed Critical 문정환
Priority to KR1019950035293A priority Critical patent/KR0156646B1/en
Priority to JP8157286A priority patent/JP2728389B2/en
Priority to US08/730,705 priority patent/US5780334A/en
Publication of KR970024206A publication Critical patent/KR970024206A/en
Application granted granted Critical
Publication of KR0156646B1 publication Critical patent/KR0156646B1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명에 의한 반도체 장치의 캐패시터 제조방법은 워드라인과 비트라인을 형성시킨 반도체기판상에 층간절연막을 형성시키고, 캐패시터 형성부위의 층간절연막을 일부 식각하여 캐패시터노드홀을 형성시킨 후에, 층간절연막과 캐패시터노드홀 위에 제1절연물질막을 형성시키는 단계와, 캐패시터노드홀의 저면에서 캐패시터콘택부 위에 콘택홀을 형성시키는 단계와, 콘택홀과 캐패시터노드홀을 매립시키면서, 제1절연물질막 위에 도전물질층을 형성시키고, 도전물질층 위에 제1절연물질막과 식각선택성이 다른 제2절연물질막을 형성시키는 단계와, 제2절연물질막을 이방성 건식각으로 제거하여 제1도전물질층을 노출시키면서, 캐패시터노드홀에서는 도전물질층으로 둘러싸인 기둥절연막을 형성시키는 단계와, 캐패시터 형성부위 외의 도전물질층을 제거하여 제1절연물질막을 노출시키는 단계와, 캐패시터노드홀의 기둥절연막을 제거하는 단계와, 제1절연물질막을 제거하여, 제1캐패시터전극을 형성시키고, 제1캐패시터전극 표면에 유전층을 형성시키고, 유전층 위에 제2캐패시터전극을 형성시키는 단계를 포함하여 이루어진다.In the method of manufacturing a capacitor of a semiconductor device according to the present invention, an interlayer insulating film is formed on a semiconductor substrate on which word lines and bit lines are formed, and the interlayer insulating film on the capacitor forming portion is partially etched to form a capacitor node hole. Forming a first insulating material film on the capacitor node hole, forming a contact hole on the capacitor contact portion at the bottom of the capacitor node hole, and filling the contact hole and the capacitor node hole, and filling the conductive material layer on the first insulating material film. Forming a second insulating material film having a different etching selectivity from the first insulating material film on the conductive material layer, and removing the second insulating material film by anisotropic dry etching to expose the first conductive material layer. Forming a pillar insulating film surrounded by the conductive material layer in the hole, and a conductive material layer other than the capacitor forming portion Exposing the first insulating material film to remove the first insulating material film; removing the pillar insulating film of the capacitor node hole; removing the first insulating material film to form the first capacitor electrode, and forming a dielectric layer on the surface of the first capacitor electrode. And forming a second capacitor electrode on the dielectric layer.

Description

반도체 기억소자의 캐패시터 제조방법.A method for manufacturing a capacitor of a semiconductor memory device.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 의한 반도체 기억소자의 캐패시터 제조방법의 단계를 도시한 단면도.2 is a cross-sectional view showing steps of a capacitor manufacturing method of a semiconductor memory device according to the present invention.

Claims (3)

반도체 기억소자의 캐패시터 제조방법에 있어서, 1) 워드라인과 비트라인을 형성시킨 반도체기판상에 층간절연막을 형성시키고, 캐패시터 형성부위의 상기 층간절연막을 일부 식각하여 캐패시터노드홀을 형성시킨 후에, 상기 층간절연막과 상기 캐패시터노드홀 위에 제1절연물질막을 형성시키는 단계와, 2) 상기 캐패시터노드홀의 저면에서 캐패시터콘택부위에 콘택홀을 형성시키는 단계와, 3) 상기 콘택홀과 상기 캐패시터노드홀을 매립시키면서, 상기 제1절연 물질막 위에 도전물질층을 형성시키고, 상기 도전물질층 위에 상기 제1절연물질막과 식각선택성이 다른 제2절연물질막을 형성시키는 단계와, 4) 상기 제2절연물질막을 이방성 건식각으로 제거하여 상기 도전물질층을 노출시키면서, 상기 캐패시터노드홀에서는 상기 도전물질층으로 둘러싸인 기둥절연막을 형성시키는 단계와, 5) 상기 캐패시터 형성부위 외의 상기 도전물질층을 제거하여 상기 제1절연물질막을 노출시키는 단계와, 6)상기 캐패시터노드홀의 상기 기둥절연막을 제거하는 단계와, 7)상기 제1절연물질막을 제거하여, 제1캐패시터전극을 형성시키고, 상기 제1캐패시터전극 표면에 유전층을 형성시키고, 상기 유전층 위에 제2캐패시터전극을 형성시키는 단계를 포함하여 이루어지는 반도체 기억소자의 캐패시터 제조방법.1. A method of manufacturing a capacitor of a semiconductor memory device, comprising: 1) forming an interlayer insulating film on a semiconductor substrate on which word lines and bit lines are formed, and partially etching the interlayer insulating film on the capacitor forming portion to form a capacitor node hole; Forming a first insulating material layer over the interlayer insulating layer and the capacitor node hole, 2) forming a contact hole in the capacitor contact portion at the bottom of the capacitor node hole, and 3) filling the contact hole and the capacitor node hole. And forming a conductive material layer on the first insulating material film, and forming a second insulating material film having an etch selectivity different from that of the first insulating material film on the conductive material layer, and 4) forming the second insulating material film. It is removed by anisotropic dry etching to expose the conductive material layer, surrounded by the conductive material layer in the capacitor node hole Forming a pillar insulating film, 5) removing the conductive material layer other than the capacitor forming portion to expose the first insulating material film, 6) removing the pillar insulating film of the capacitor node hole, 7) Removing the first insulating material layer to form a first capacitor electrode, forming a dielectric layer on the surface of the first capacitor electrode, and forming a second capacitor electrode on the dielectric layer. Way. 제1항에 있어서, 상기 2)단계에서, 상기 콘택홀을 형성시킴에 있어서 표면에 상기 제1절연물질막이 형성된 상기 캐패시터노드홀의 측벽에 측벽스페이서를 형성시키고, 상기 측벽스페이서를 마스크로 하여 상기 측벽스페이서 사이의 상기 캐패시터노드홀 저면을 식각하여 콘택홀을 형성시키는 것을 특징으로 하는 반도체 기억소자의 캐패시터 제조방법.The method of claim 1, wherein in the step 2), in forming the contact hole, a sidewall spacer is formed on a sidewall of the capacitor node hole in which the first insulating material layer is formed, and the sidewall spacer is used as a mask. And forming a contact hole by etching the bottom surface of the capacitor node hole between the spacers. 제1항 또는 제2항에 있어서, 상기 제1절연물질막으로 질화막을 형성시키고, 상기 제2절연물질막으로 산화막을 형성시키는 것을 특징으로 하는 반도체 기억소자의 캐패시터 제조방법.The method of claim 1, wherein a nitride film is formed of the first insulating material film, and an oxide film is formed of the second insulating material film. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950035293A 1995-10-13 1995-10-13 Capacitor manufacture of semiconductor device KR0156646B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950035293A KR0156646B1 (en) 1995-10-13 1995-10-13 Capacitor manufacture of semiconductor device
JP8157286A JP2728389B2 (en) 1995-10-13 1996-06-18 Method for manufacturing capacitor of semiconductor memory device
US08/730,705 US5780334A (en) 1995-10-13 1996-10-11 Method of fabricating capacitor of semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950035293A KR0156646B1 (en) 1995-10-13 1995-10-13 Capacitor manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
KR970024206A true KR970024206A (en) 1997-05-30
KR0156646B1 KR0156646B1 (en) 1998-10-15

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KR1019950035293A KR0156646B1 (en) 1995-10-13 1995-10-13 Capacitor manufacture of semiconductor device

Country Status (3)

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US (1) US5780334A (en)
JP (1) JP2728389B2 (en)
KR (1) KR0156646B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100388206B1 (en) * 2000-12-29 2003-06-19 주식회사 하이닉스반도체 Method for manufacturing capacitor of semiconductor device

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0168355B1 (en) * 1995-11-02 1999-02-01 김광호 Interconnection forming method of semiconductor device
KR0184064B1 (en) * 1995-12-22 1999-03-20 문정환 Method of manufacturing capacitor of semiconductor device
KR100454631B1 (en) * 1997-06-30 2005-04-06 주식회사 하이닉스반도체 Manufacturing method of storage electrode of semiconductor device
JPH11186524A (en) 1997-12-24 1999-07-09 Mitsubishi Electric Corp Semiconductor device and its manufacture
TW377512B (en) * 1998-02-06 1999-12-21 United Microelectronics Corp Capacitor for DRAM and the method of manufacturing the same
US6258663B1 (en) * 1998-05-01 2001-07-10 Vanguard International Semiconductor Corporation Method for forming storage node
JP3296324B2 (en) * 1999-04-07 2002-06-24 日本電気株式会社 Method for manufacturing semiconductor memory device
US7268383B2 (en) * 2003-02-20 2007-09-11 Infineon Technologies Ag Capacitor and method of manufacturing a capacitor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0553791A1 (en) * 1992-01-31 1993-08-04 Nec Corporation Capacitor electrode for dram and process of fabrication thereof
KR100231593B1 (en) * 1993-11-19 1999-11-15 김주용 Capacity manufacturing method of semiconductor
US5501998A (en) * 1994-04-26 1996-03-26 Industrial Technology Research Institution Method for fabricating dynamic random access memory cells having vertical sidewall stacked storage capacitors
US5595929A (en) * 1996-01-16 1997-01-21 Vanguard International Semiconductor Corporation Method for fabricating a dram cell with a cup shaped storage node

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100388206B1 (en) * 2000-12-29 2003-06-19 주식회사 하이닉스반도체 Method for manufacturing capacitor of semiconductor device

Also Published As

Publication number Publication date
JP2728389B2 (en) 1998-03-18
KR0156646B1 (en) 1998-10-15
JPH09116114A (en) 1997-05-02
US5780334A (en) 1998-07-14

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