KR960026793A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device. As the semiconductor device is highly integrated, more capacitance is required in a narrow area, and thus the surface area of the storage electrode is increased to maximize the capacitance of the capacitor. In a structure in which insulating layers and other conductive layers are stacked on the contacted conductive layer, holes are formed in the center so that the insulating layers and other conductive layers are etched and the first conductive layer is not etched, and the structure is formed after the etching process using the storage electrode mask. Another conductive layer spacer is formed on the sidewalls of the semiconductor layer, and then the insulating layers are removed, thereby forming a storage electrode having an increased surface area, thereby enabling high integration of the semiconductor device.

Description

Capacitor Manufacturing Method of Semiconductor Device

Since this is an open matter, no full text was included.

1A to 1F are sectional views showing a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

Claims (7)

Forming a contact hole by etching the first insulating layer and the lower insulating layer by forming a lower insulating layer on the semiconductor substrate, forming a first insulating layer on the lower insulating layer, and etching using a contact mask. Forming a first conductive layer connected to the semiconductor substrate through the contact hole, forming a second insulating layer on the first conductive layer, and forming a second conductive layer on the second insulating layer. Forming a layer, forming a first photoresist pattern on the second conductive layer, and forming a hole by etching the second conductive layer and the second insulating layer using the first photoresist pattern as a mask. And forming a third insulating film spacer on the sidewall of the hole, forming a second photoresist film pattern inside the hole, etching a second thickness of the second conductive layer, and forming a third photoresist film on the entire structure. Forming a turn, etching the second conductive layer, the second insulating layer, and the first conductive layer using the third photoresist pattern as a mask, and removing the third photoresist pattern and the second photoresist pattern And forming a third conductive layer on the entire surface, and forming a third conductive layer spacer by etching the entire surface by the thickness of the third conductive layer, and removing the third, second, and first insulating layers. A capacitor manufacturing method of a semiconductor device comprising the step of forming a storage electrode. The method of claim 1, wherein the first photoresist pattern is larger than a contact mask. The method of claim 1, wherein the first, second, and third conductive layers are formed of a polycrystalline silicon film. The method of claim 1, wherein the second photoresist layer pattern is formed on the entire surface of the second photoresist layer, and the oxygen atmosphere is formed by an etching process using plasma. The semiconductor device of claim 1, wherein the etching of the second conductive layer by a predetermined thickness is performed using a difference in etching selectivity between the third insulating layer spacer, the second photoresist pattern, and the second conductive layer. Capacitor manufacturing method. The method of claim 1, wherein the third photoresist layer pattern is used as a storage electrode mask. The method of claim 1, wherein the first, second, third, and insulating layers are removed using an etch selectivity difference from the first, second, and third conductive layers. ※ Note: The disclosure is based on the initial application.