KR960032747A - Capacitor Formation Method of Semiconductor Device - Google Patents

Abstract

The present invention facilitates the fabrication of highly integrated semiconductor devices by contacting the charge storage electrodes with a fine width using spacers and forming capacitors by increasing the surface area of the charge storage electrodes in a plurality of conductive film formation, insulating film formation processes and etching processes. In addition, by securing the capacitance required by the highly integrated semiconductor device, there is an effect of improving the high integration of the device.

Description

Capacitor Formation Method of Semiconductor Device

Since this is an open matter, no full text was included.

3A to 3G are capacitor manufacturing process diagrams according to one embodiment of the present invention.

Claims (2)

Sequentially forming a first conductive film, a planarizing second insulating film, and an etch stop third insulating film on a substrate having a conventional transistor structure and an interlayer first insulating film formed thereon; Etching the third and second insulating layers using a mask having a size (width) larger than a predetermined charge storage electrode contact hole; Forming a second conductive film over the entire structure and anisotropically etching the second conductive film until the first insulating film is exposed; Etching the exposed first insulating layer to form a charge storage electrode contact hole; Forming a third conductive film on top of the entire structure; Forming a fourth insulating layer pattern having a size (width) larger than an etch size of the third insulating layer and the second insulating layer and being open to a size smaller than that of the charge storage electrode; Forming a fourth conductive film for the charge storage electrode on the entire structure; And using the charge storage electrode mask, the fourth conductive film anisotropic etching, the fourth insulating film removal, the third conductive film anisotropic etching, the third insulating film and the second insulating film removal, and the first conductive film anisotropic etching are sequentially performed. And forming a charge storage electrode comprising the first conductive film and the fourth conductive film. The method of claim 1, wherein the third insulating layer is an insulating layer having an etch selectivity with the first insulating layer. ※ Note: The disclosure is based on the initial application.