KR940016801A - Method for manufacturing storage electrode of DRAM cell - Google Patents

Method for manufacturing storage electrode of DRAM cell Download PDF

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Publication number
KR940016801A
KR940016801A KR1019920027057A KR920027057A KR940016801A KR 940016801 A KR940016801 A KR 940016801A KR 1019920027057 A KR1019920027057 A KR 1019920027057A KR 920027057 A KR920027057 A KR 920027057A KR 940016801 A KR940016801 A KR 940016801A
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KR
South Korea
Prior art keywords
storage electrode
forming
polysilicon layer
layer
intermediate conductive
Prior art date
Application number
KR1019920027057A
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Korean (ko)
Inventor
박상호
백현철
백인혁
김상익
백동원
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019920027057A priority Critical patent/KR940016801A/en
Publication of KR940016801A publication Critical patent/KR940016801A/en

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  • Semiconductor Memories (AREA)

Abstract

본 발명 고집 반도체소자의 디램셀의 저장전극 제조방법에 있어서, 저장전극을 3층으로 형성하되 제1 및 제2폴리실리콘층 패턴 사이에 요부를 갖는 중간도전층 패턴으로 형성하여 저장전극의 표면적을 중대시켜서 캐패시터 용량을 증대시킬 수 있는 기술이다.In the method for manufacturing a storage electrode of a DRAM cell of the highly integrated semiconductor device of the present invention, the storage electrode is formed in three layers, but the intermediate electrode layer pattern having recesses between the first and second polysilicon layer patterns is formed to reduce the surface area of the storage electrode. It is a technology that can increase the capacitor capacity by making it critical.

Description

디램셀의 저장전극 제조방법Method for manufacturing storage electrode of DRAM cell

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 및 제2B도는 본 발명에 의해 디램셀의 저장전극을 형성한 상태의 단면도.2A and 2B are cross-sectional views of the storage electrode of the DRAM cell formed in accordance with the present invention.

Claims (3)

디램셀의 스택캐패시터 저장전극 제조방법에 있어서, 실리콘기판 상부에 MOSFET를 형성하고, 전체 구조상부에 내부절연막을 형성하고, 실리콘기판이 노출된 콘택홀을 형성하는 단계와, 전체적으로 제1폴리실리콘층, 중간도전층 및 제2폴리실리콘층을 적층하고 그 상부에 저장전극 마스크용 감광막 패턴을 형성하는 단계와, 노출된 제2폴리실리콘층을 이방성식각으로 제2폴리실리콘층 패턴을 형성하는 단계와, 노출되는 중간도전층을 등방성식각으로 중간도전층 패턴을 형성하는 단계와, 상기 공정으로 노출된 제1폴리실리콘층을 이방성식각으로 제1폴리실리콘층 패턴을 형성하고, 저장전극마스크용 감광막 패턴을 제거하여 제1 및 제2폴리실리콘층 패턴 사이에 있는 요부를 갖는 중간도전층 패턴으로 구비되는 저장전극을 형성하는 것을 특징으로 하는 디램셀의 저장전극 제조방법.A method for manufacturing a stack capacitor storage electrode of a DRAM cell, comprising: forming a MOSFET on a silicon substrate, forming an internal insulating layer on the entire structure, and forming a contact hole in which the silicon substrate is exposed, and a first polysilicon layer as a whole Stacking an intermediate conductive layer and a second polysilicon layer and forming a photoresist pattern for a storage electrode mask thereon; forming a second polysilicon layer pattern by anisotropically etching the exposed second polysilicon layer; Forming an intermediate conductive layer pattern by isotropic etching the exposed intermediate conductive layer, and forming a first polysilicon layer pattern by anisotropic etching the first polysilicon layer exposed by the above process, and forming a photoresist pattern for a storage electrode mask. To form a storage electrode provided with an intermediate conductive layer pattern having recesses between the first and second polysilicon layer patterns. Method for manufacturing a storage electrode of a DRAM cell. 제1항에 있어서, 상기 중간도전층은 제1폴리실리콘층과 식각선택비가 다른 것을 특징으로 하는 디램셀의 저장전극 제조방법.The method of claim 1, wherein the intermediate conductive layer has an etching selectivity different from that of the first polysilicon layer. 제2항에 있어서, 상기 중간도전층은 텅스텐-실리사이드층 또는 티타늄-실리사이드층으로 형성하는 것을 특징으로 하는 디램셀의 저장전극 제조방법.The method of claim 2, wherein the intermediate conductive layer is formed of a tungsten-silicide layer or a titanium-silicide layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920027057A 1992-12-31 1992-12-31 Method for manufacturing storage electrode of DRAM cell KR940016801A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920027057A KR940016801A (en) 1992-12-31 1992-12-31 Method for manufacturing storage electrode of DRAM cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920027057A KR940016801A (en) 1992-12-31 1992-12-31 Method for manufacturing storage electrode of DRAM cell

Publications (1)

Publication Number Publication Date
KR940016801A true KR940016801A (en) 1994-07-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920027057A KR940016801A (en) 1992-12-31 1992-12-31 Method for manufacturing storage electrode of DRAM cell

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KR (1) KR940016801A (en)

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