KR950034745A

KR950034745A - Capacitor Manufacturing Method of Semiconductor Device

Info

Publication number: KR950034745A
Application number: KR1019940011010A
Authority: KR
Inventors: 김근태; 정진기; 정문식
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1994-05-20
Filing date: 1994-05-20
Publication date: 1995-12-28

Abstract

본 발명은 반도체소자의 캐패시터 제조방법에 관한 것으로서, 전하보존전극 콘택홀을 메운 폴리실리콘층 패턴상에 그와 중첩되는 산화막 패턴을 형성하고, 상기 산화막 패턴을 식각균일도가 떨어지는 조건에서 건식식각하여 폴리실리콘층 패턴상에 다수개의 산화막 잔류층을 형성하며, 상기 산화막 잔류층을 마스크로 상기 폴리실리콘층 패턴을 소정 두께 식각하여 다수개의 홈을 구비하는 전하보존전극을 형성하였으므로, 공정이 간단하여 공정수율이 향상되고, 표면적이 증가되어 정전용량이 증가되므로 소자동작의 신뢰성이 향상된다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device. A plurality of oxide residual layers were formed on the silicon layer pattern, and the polysilicon layer pattern was etched by a predetermined thickness using the oxide residual layer as a mask to form a charge storage electrode having a plurality of grooves. This is improved, the surface area is increased, and the capacitance is increased, so that the reliability of device operation is improved.

Description

Capacitor Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1D도는 본 발명에 따른 반도체소자의 캐패시터 제조 공정도.1D is a manufacturing process diagram of a capacitor of a semiconductor device according to the present invention.

Claims

Forming an interlayer insulating film on the entire surface of the semiconductor substrate in which the diffusion region is formed on the semiconductor substrate on both sides of the device isolation insulating film, the gate oxide film, the gate electrode and the gate electrode for device isolation; Removing the interlayer insulating film on a predetermined portion to form a charge storage electrode contact hole, forming a polysilicon layer filling the charge storage electrode contact hole, forming an oxide film on the polysilicon layer; Forming a polysilicon layer pattern filling the charge storage electrode contact hole and patterning the oxide film pattern overlapping the upper portion of the polysilicon layer by filling the oxide film with a portion of the polysilicon layer to be left as a charge storage electrode; The polysilicon layer is etched by a dry etching method having a low etching uniformity Leaving a plurality of oxide residual layers on the pattern, etching a predetermined thickness of the polysilicon layer pattern exposed using the oxide residual layer as a mask to form a plurality of grooves, and removing the residual oxide layer Capacitor manufacturing method of a semiconductor device having a.

The method of claim 1, wherein the etching method of the oxide layer is a high-pressure low-power plasma etching method, the pressure of which is 800 mTorr or more and the power of 200 W or less.

※ Note: The disclosure is based on the initial application.