KR940022854A - Method of forming contact window of semiconductor device - Google Patents

Method of forming contact window of semiconductor device Download PDF

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Publication number
KR940022854A
KR940022854A KR1019930003109A KR930003109A KR940022854A KR 940022854 A KR940022854 A KR 940022854A KR 1019930003109 A KR1019930003109 A KR 1019930003109A KR 930003109 A KR930003109 A KR 930003109A KR 940022854 A KR940022854 A KR 940022854A
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KR
South Korea
Prior art keywords
forming
oxide film
aluminum oxide
contact window
semiconductor device
Prior art date
Application number
KR1019930003109A
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Korean (ko)
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KR960013638B1 (en
Inventor
김영선
신유균
박영욱
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김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019930003109A priority Critical patent/KR960013638B1/en
Publication of KR940022854A publication Critical patent/KR940022854A/en
Application granted granted Critical
Publication of KR960013638B1 publication Critical patent/KR960013638B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체장치의 제조방법에 관한 것으로, 특히 알루미늄산화막을 식각저지층으로 하여 반도체장치의 접촉창을 형성시키는 방법에 있어서, 게이트산화막이 형성된 반도체기판에 게이트전극을 형성하는 공정, 상기 게이트전극 측면에 스페이서를 형성하는 공정, 상기 기판 전면에 알루미늄산화막을 형성하는 공정, 상기 알루미늄산화막 상에 평탄화막을 형성하는 공정, 접촉창영역의 상기 평탄화막과 알루미늄산화막을 차례로 제거하는 공정으로 이루어진 것을 특징으로 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. In particular, the method for forming a contact window of a semiconductor device using an aluminum oxide film as an etch stop layer, the method comprising: forming a gate electrode on a semiconductor substrate on which a gate oxide film is formed; Forming a spacer on the side surface, forming an aluminum oxide film on the entire surface of the substrate, forming a planarization film on the aluminum oxide film, and removing the planarization film and the aluminum oxide film in the contact window region in order. do.

따라서 상기한 본 발명에 의하면, 고집적 반도체장치에 있어서 사진공정에서의 미세한 마스크 미스얼라인에 의해서도 쉽게 유발할수 있는 게이트전극과 비트라인, 또는 게이트전극과 스토리지전극사이의 단락을 방지할 수 있는 접촉창을 형성할 수 있다.Therefore, according to the present invention described above, in the highly integrated semiconductor device, a contact window that can prevent a short circuit between the gate electrode and the bit line, or the gate electrode and the storage electrode, which can be easily caused even by a fine mask misalignment in the photolithography process. Can be formed.

Description

반도체장치의 접촉창 형성방법Method of forming contact window of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제5도 내지 제8도는 본 발명에 의한 반도체장치의 접촉창 형성방법을 설명하기 위해 도시한 단면도들.5 through 8 are cross-sectional views illustrating a method of forming a contact window of a semiconductor device according to the present invention.

Claims (5)

게이트산화막이 형성된 반도체기판에 게이트전극을 형성하는 공정, 상기 게이트전극 측면에 스페이서를 공정, 상기 기판 전면에 알루미늄산화막을 형성하는 공정, 상기 알루미늄산화막상에 평탄화막을 형성하는 공정, 접촉창영역의 상기 평탄화막과 알루미늄산화막을 차례로 제거하는 공정으로 이루어진 것을 특징으로 하는 반도체장치의 접촉창 형성방법.Forming a gate electrode on the semiconductor substrate on which the gate oxide film is formed; forming a spacer on the side of the gate electrode; forming an aluminum oxide film on the entire surface of the substrate; forming a planarization film on the aluminum oxide film; A method of forming a contact window in a semiconductor device, comprising the steps of sequentially removing the planarization film and the aluminum oxide film. 제1항에 있어서, 상기 알루미늄산화막 30Å-200Å의 두께로 증착하는 것을 특징으로 하는 반도체장치의 접촉창 형성방법.The method of claim 1, wherein the aluminum oxide film is deposited to a thickness of 30 kPa to 200 kPa. 제1항에 있어서, 상기 게이트전극 상부의 절연층과 측벽스페이서는 실리콘산화막으로 이루어진 것을 특징으로 하는 반도체장치의 접촉창 형성방법.The method of claim 1, wherein the insulating layer and the sidewall spacers on the gate electrode are formed of a silicon oxide film. 제1항에 있어서, 상기 접촉창영역의 평탄화막과 알루미늄산화막을 차례로 제거하는 공정에서 상기 평탄화막은 건식식각으로 제거하는 것을 특징으로 하는 반도체장치 접촉창 형성방법.The method of claim 1, wherein the planarization layer is removed by dry etching in a step of sequentially removing the planarization layer and the aluminum oxide layer of the contact window region. 제4항에 있어서, 상기 접촉창영역의 알루미늄산화막은 습식식각으로 제거하는 것을 특징으로 하는 반도체장치의 접촉창 형성 방법.The method of claim 4, wherein the aluminum oxide layer of the contact window region is removed by wet etching. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930003109A 1993-03-03 1993-03-03 Forming method for contact window of semiconductor KR960013638B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930003109A KR960013638B1 (en) 1993-03-03 1993-03-03 Forming method for contact window of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930003109A KR960013638B1 (en) 1993-03-03 1993-03-03 Forming method for contact window of semiconductor

Publications (2)

Publication Number Publication Date
KR940022854A true KR940022854A (en) 1994-10-21
KR960013638B1 KR960013638B1 (en) 1996-10-10

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Publication number Priority date Publication date Assignee Title
US8877645B2 (en) 2011-09-15 2014-11-04 International Business Machines Corporation Integrated circuit structure having selectively formed metal cap

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