KR960026819A - Method for manufacturing storage electrode of semiconductor device - Google Patents

Abstract

The present invention relates to a method for manufacturing a storage electrode of a semiconductor device, wherein a first insulating layer is formed on an upper portion of a lower insulating layer formed on a semiconductor substrate, and a contact hole is formed to expose a predetermined portion of the semiconductor substrate using a contact mask. Forming a first photoresist pattern filling the contact hole, forming a second insulation spacer on a sidewall of the first photoresist pattern, and then removing the first photoresist pattern and conducting an upper portion of the entire surface to be connected to the semiconductor substrate. By forming a layer and forming a storage electrode having an increased surface area through the etching process using a storage electrode mask and the first and second insulating film removal processes, the capacitance of the capacitor can be sufficiently secured in a later process, thereby improving reliability and high integration of the semiconductor device. Technology to enable this.

Description

Method for manufacturing storage electrode of semiconductor device

Since this is an open matter, no full text was included.

1C is a cross-sectional view illustrating a manufacturing process of a storage electrode of a semiconductor device according to an exemplary embodiment of the present invention.

Claims (7)

Sequentially forming a lower insulating layer and a first insulating layer on the semiconductor substrate; forming a contact hole exposing the semiconductor substrate by an etching process using a contact mask; and a first photoresist pattern filling the contact hole. Forming a second insulating film spacer on the sidewalls of the first photoresist pattern, removing the first photoresist pattern, and forming a conductive layer on the entire surface of the semiconductor substrate. And forming a second photoresist pattern on the entire surface, etching the conductive layer using the second photoresist pattern as a mask, removing the second photoresist pattern, and forming the second insulating film spacer. And removing the first insulating layer. The method of claim 1, wherein the first photoresist pattern is smaller than the storage electrode mask. The method of claim 1, wherein the first insulating layer and the second insulating layer are formed of TEOS. The method of claim 1, wherein the first insulating layer and the second insulating layer are formed of PSG. The method of claim 1, wherein the conductive layer is formed of a polycrystalline silicon film. The method of claim 1, wherein the second photoresist layer pattern is formed using a storage electrode mask. The method of claim 1, wherein the first insulating layer and the second insulating layer spacer are removed using an etch selectivity difference between the conductive layers. ※ Note: The disclosure is based on the initial application.