KR960026815A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device, and as the semiconductor device is highly integrated, more capacitance is required in a narrow area, thereby increasing the surface area of the storage electrode, thereby maximizing the capacitance of the capacitor. A sacrificial film is formed on the connected semiconductor substrate using a misaligned storage electrode mask, and a second conductive layer is formed to planarize the upper portion of the semiconductor substrate. The second conductive layer and the first conductive layer are sequentially etched and the sacrificial layer is removed to form a storage electrode having an increased surface area, thereby enabling high integration of the semiconductor device and thereby improving reliability of the semiconductor device.

Description

Capacitor Manufacturing Method of Semiconductor Device

Since this is an open matter, no full text was included.

1A to 1D are sectional views showing a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

Claims (7)

Sequentially forming a lower insulating layer and an insulating layer on the semiconductor substrate, forming a contact hole exposing a predetermined portion of the semiconductor substrate by an etching process using a contact mask, and forming a contact hole in the semiconductor substrate through the contact hole. Forming a first conductive layer to be connected; forming a sacrificial film on the first conductive layer; forming a second conductive layer to planarize the entire surface; and etching using a storage electrode mask. And sequentially etching the second conductive layer and the first conductive layer, and forming a storage electrode having an increased surface area by removing the sacrificial layer. The method of claim 1, wherein the insulating film is formed of a silicon nitride film. The method of claim 1, wherein the first and second conductive layers are formed of a polycrystalline silicon film. The method of claim 1, wherein the sacrificial layer is formed of an insulating film. The method of claim 1, wherein the sacrificial layer is formed using a misaligned storage electrode mask. The method of claim 1, wherein the sacrificial layer removing process is performed by a wet method using a difference in etching selectivity between the first conductive layer and the second conductive layer. The method of claim 1, wherein the sacrificial layer removing step is performed by using the sacrificial layer and the insulating layer as etch barriers. ※ Note: The disclosure is based on the initial application.