KR960026792A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Capacitor Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR960026792A
KR960026792A KR1019940032798A KR19940032798A KR960026792A KR 960026792 A KR960026792 A KR 960026792A KR 1019940032798 A KR1019940032798 A KR 1019940032798A KR 19940032798 A KR19940032798 A KR 19940032798A KR 960026792 A KR960026792 A KR 960026792A
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South Korea
Prior art keywords
layer
insulating layer
conductive layer
forming
spacer
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KR1019940032798A
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Korean (ko)
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KR0166492B1 (en
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김석수
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김주용
현대전자산업 주식회사
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Priority to KR1019940032798A priority Critical patent/KR0166492B1/en
Publication of KR960026792A publication Critical patent/KR960026792A/en
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Publication of KR0166492B1 publication Critical patent/KR0166492B1/en

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    • H01L28/91
    • H01L28/75

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  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 반도체소자의 캐패시터 제조방법에 관한 것으로, 반도체소자가 고집적화됨에 따라 좁은 면적에서 더욱 많은 정전용량을 필요로하여 저장전극의 표면적을 증가시킴으로써 캐패시터의 정전용량을 극대화하는데 있어서, 도전층이 콘택된 반도체기판 상부에 감광막패턴을 이용하여 상기 제1도전층을 일정두께 식각하고 상기 제1도전층의 식각면에 절연막 스페이서를 형성한 다음, 다른 감광막패턴을 이용하여 선택적 성장 절연막을 형성하고 상기 도전층의 상부 구조물 측벽에 다른 도전층 스페이서를 형성한 다음, 상기 절연막과 선택적 성장 절연막을 제거함으로써 저장전극을 형성하여 반도체소자의 고집적화를 가능하게 하는 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device, and as the semiconductor device becomes highly integrated, more capacitance is required in a narrow area, thereby increasing the surface area of the storage electrode, thereby maximizing the capacitance of the capacitor. The first conductive layer is etched to a predetermined thickness by using a photoresist pattern on the semiconductor substrate, an insulating film spacer is formed on an etching surface of the first conductive layer, and then a selective growth insulating film is formed using another photoresist pattern and the conductive Another conductive layer spacer is formed on the sidewalls of the upper structure of the layer, and then a storage electrode is formed by removing the insulating layer and the selective growth insulating layer, thereby enabling high integration of the semiconductor device.

Description

반도체소자의 캐패시터 제조방법Capacitor Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1E도는 본 발명의 실시예에 따른 반도체소자의 캐패시터 제조공정을 도시한 단면도.1A to 1E are sectional views showing a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

Claims (7)

반도체기판 상부에 하부 절연층을 형성하는 공정과, 상기 하부절연층 상부에 제1절연막을 형성하는 공정과, 콘택마스크를 이용한 식각공정으로 상기 제1절연막과 하부절연층을 식각하여 콘택홀을 형성하는 공정과, 상기 콘택홀을 통하여 상기 반도체기판에 접속되는 제1도전층을 형성하는 공정과, 상기 제1도전층 상부에 제1감광막패턴을 형성하는 공정과, 상기 제1감광막패턴을 마스크로하여 상기 제1도전층을 일정두께 식각하는 공정과, 상기 제1도전층의 식각면에 제2절연막 스페이서를 형성하는 공정과, 전체표면상부에 제2감광막패턴을 형성하는 공정과, 상기 제2절연막 스페이서를 선택성장시켜 선택적 성장 절연막을 형성하는 공정과, 상기 제2감광막패턴을 제거하는 공정과, 전체표면상부에 제2도전층을 일정두께 형성하는 공정과, 상기 제2도전층을 이방성식각하여 상기 선택적 성장 절연막의 측벽에 제2도전층 스페이서를 형성하는 공정과, 상기 선택적 성장 절연막, 제2절연막 스페이서 및 제1절연막을 제거하는 공정을 포함하는 반도체소자의 캐패시터 제조방법.Forming a contact hole by etching the first insulating layer and the lower insulating layer by forming a lower insulating layer on the semiconductor substrate, forming a first insulating layer on the lower insulating layer, and etching using a contact mask. Forming a first conductive layer connected to the semiconductor substrate through the contact hole, forming a first photoresist pattern on the first conductive layer, and using the first photoresist pattern as a mask. Etching the first conductive layer to a predetermined thickness, forming a second insulating film spacer on an etched surface of the first conductive layer, forming a second photoresist pattern on the entire surface of the first conductive layer, and Selectively growing an insulating film spacer to form a selective growth insulating film, removing the second photoresist film pattern, forming a second conductive layer on the entire surface, and forming a predetermined thickness on the entire surface of the insulating film spacer; Forming a second conductive layer spacer on the sidewalls of the selective growth insulating layer by anisotropically etching the layer; and removing the selective growth insulating layer, the second insulating layer spacer, and the first insulating layer. 제1항에 있어서, 상기 제1절연막과 제2절연막은 TEOS로 형성된 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the first insulating layer and the second insulating layer are formed of TEOS. 제1항에 있어서, 상기 제1절연막과 제2절연막은 PSG로 형성된 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the first insulating layer and the second insulating layer are formed of PSG. 제1항에 있어서, 상기 제2감광막패턴은 상기 제2절연막 스페이서의 바깥쪽으로 상기 제2절연막 스페이서에서 이격되어 형성된 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the second photoresist layer pattern is formed to be spaced apart from the second insulation layer spacer to the outside of the second insulation layer spacer. 제1항에 있어서, 상기 제1도전층과 제2도전층은 다결정실리콘막으로 형성된 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the first conductive layer and the second conductive layer are formed of a polycrystalline silicon film. 제1항에 있어서, 상기 선택적 성장 절연막은 상기 제2감광막패턴과 제1도전층을 성장장벽으로하여 과도성장된 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the selective growth insulating layer is overgrown using the second photoresist pattern and the first conductive layer as growth barriers. 제1항에 있어서, 상기 제1절연막, 제2절연막 스페이서 및 선택적 성장 산화막은 상기 제1도전층 및 제2도전층 스페이서와의 식각선택비 차이를 이용하여 제거하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The capacitor of claim 1, wherein the first insulating layer, the second insulating layer spacer, and the selective growth oxide layer are removed using an etching selectivity difference between the first conductive layer and the second conductive layer spacer. Manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940032798A 1994-12-05 1994-12-05 Capacitor fabrication method of semiconductor device KR0166492B1 (en)

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KR1019940032798A KR0166492B1 (en) 1994-12-05 1994-12-05 Capacitor fabrication method of semiconductor device

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Application Number Priority Date Filing Date Title
KR1019940032798A KR0166492B1 (en) 1994-12-05 1994-12-05 Capacitor fabrication method of semiconductor device

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KR960026792A true KR960026792A (en) 1996-07-22
KR0166492B1 KR0166492B1 (en) 1999-01-15

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