KR960036058A

KR960036058A - Capacitor Manufacturing Method of Semiconductor Device

Info

Publication number: KR960036058A
Application number: KR1019950004684A
Authority: KR
Inventors: 노태훈
Original assignee: 문정환; 엘지반도체 주식회사
Priority date: 1995-03-08
Filing date: 1995-03-08
Publication date: 1996-10-28

Abstract

본 발명에 의한 반도체 소자의 캐패시터 제조방법은 트렌지스터가 형성된 반도체기판상에 제1절연막, 제2절연막, 제3절연막, 그리고 제1전도층을 순차적으로 형성시키는 단계와, 하부 캐패시터전극의 콘택영역의 제1절연막, 제2절연막, 제3절연막과 제1전도층을 식각하는 단계와, 제1전도층과 하부 캐패시터전극의 콘택영역 위에 제2전도층을 형성시키는 단계와, 제1전도층과 제2전도층을 선택식각하여 하부 캐패시터전극의 콘택영역상에 잔류사켜 노드패턴을 형성시키고, 노출된 제3절연막을 제거하는 단계와, 노드패턴 위에 유전체막과 제3전도층을 순차적으로 형성시키는 단계를 포함하여 이루어진다.A method of manufacturing a capacitor of a semiconductor device according to the present invention comprises the steps of sequentially forming a first insulating film, a second insulating film, a third insulating film, and a first conductive layer on a semiconductor substrate on which a transistor is formed; Etching the first insulating layer, the second insulating layer, the third insulating layer, and the first conductive layer, forming a second conductive layer on the contact region of the first conductive layer and the lower capacitor electrode, and forming the first conductive layer and the first conductive layer. Selectively etching the conductive layer to form a node pattern on the contact region of the lower capacitor electrode, removing the exposed third insulating layer, and sequentially forming the dielectric layer and the third conductive layer on the node pattern. It is made, including.

Description

Capacitor Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 의한 반도체 소자의 캐패시터 제조방법을 설명하기 위한 도면.2 is a view for explaining a method of manufacturing a capacitor of a semiconductor device according to the present invention.

Claims

1. A method of manufacturing a capacitor of a semiconductor device, comprising: 1) sequentially forming a first insulating film, a second insulating film, a third insulating film, and a first conductive layer on a semiconductor substrate on which a transistor is formed; and 2) forming a lower capacitor electrode. Etching the first insulating layer, the second insulating layer, the third insulating layer, and the first conductive layer in the contact region; and 3) forming a second conductive layer over the contact region of the first conductive layer and the lower capacitor electrode. 4) selectively etching the first conductive layer and the second conductive layer and remaining on the contact region of the lower capacitor electrode to form a node pattern, and removing the exposed second insulating layer; A method of manufacturing a capacitor of a semiconductor device comprising the step of sequentially forming a dielectric film body and the third conductive layer on the node pattern.

The method of claim 1, wherein the second insulating layer is formed of a material having an etch rate different from that of the first insulating layer and the third insulating layer.

※ Note: The disclosure is based on the initial application.