KR970053994A - Capacitor Manufacturing Method of Semiconductor Memory Device - Google Patents

Capacitor Manufacturing Method of Semiconductor Memory Device Download PDF

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Publication number
KR970053994A
KR970053994A KR1019950047818A KR19950047818A KR970053994A KR 970053994 A KR970053994 A KR 970053994A KR 1019950047818 A KR1019950047818 A KR 1019950047818A KR 19950047818 A KR19950047818 A KR 19950047818A KR 970053994 A KR970053994 A KR 970053994A
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KR
South Korea
Prior art keywords
trench
forming
film
capacitor
conductive material
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Application number
KR1019950047818A
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Korean (ko)
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KR0171097B1 (en
Inventor
임준희
정문모
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문정환
Lg 반도체주식회사
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Priority to KR1019950047818A priority Critical patent/KR0171097B1/en
Publication of KR970053994A publication Critical patent/KR970053994A/en
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Publication of KR0171097B1 publication Critical patent/KR0171097B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명에 의한 반도체 기억소자의 캐패시터 제조방법에서는 반도체기판상에 적층된 층간절연막에 트랜치를 형성시키고, 캐패시터 접촉부위의 트랜치 저면에 접촉창을 형성시키는 단계와, 트랜치의 측벽에 절연물질측벽을 형성시키는 단계와, 층간절연막과 트랜치와 접촉창 위헤 제1도전물질을 형성시키는 단계와, 제1도전물질층 위헤 절연물질막을 형성시키는 단계와, 절연물질막을 이방성 건식 식각하여 트랜치 내에만 잔재되도록 하는 단계와, 제1도전물질층의 노출된 부위를 제거하여, 층간절연막의 상부와, 트랜치의 측벽에 형성된 절연물질측벽 상부가 노출되도록 하면서, 트랜치에만 제1도전물질층이 잔재되도록 하는 단계와, 트랜치 내에 잔재된 절연물질막을 제거하고, 트랜치의 측벽에 형성된 절연물질측벽을 제거하여, 트랜치의 내에 실린더형의 제1캐패시터전극이 형성되도록 하는 단계와, 제1캐패시터전극 위에 유전막을 형성시키고, 유전막 위에 제2캐패시터전극을 형성시키는 단계를 포함하여 이루어진다.In the method of manufacturing a capacitor of a semiconductor memory device according to the present invention, a trench is formed in an interlayer insulating film stacked on a semiconductor substrate, and a contact window is formed in a trench bottom surface of a capacitor contact portion, and an insulating material side wall is formed on the sidewall of the trench. Forming a first conductive material over the interlayer insulating film, the trench, and the contact window; forming an insulating material film over the first conductive material layer; and anisotropic dry etching the insulating material film so that it remains only in the trench. Removing the exposed portions of the first conductive material layer to expose the upper portion of the interlayer insulating film and the upper portion of the insulating material side wall formed on the sidewalls of the trench, leaving the first conductive material layer only in the trench; The insulating material film remaining in the trench is removed, and the insulating material side wall formed on the sidewall of the trench is removed, And forming a dielectric capacitor on the first capacitor electrode, and forming a second capacitor electrode on the dielectric film.

Description

반도체 기억소자의 캐패시터 제조방법Capacitor Manufacturing Method of Semiconductor Memory Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 반도체 기억소자의 캐패시터 제조방법의 일실시예를 도시한 단면도.2 is a cross-sectional view showing an embodiment of a capacitor manufacturing method of a semiconductor memory device according to the present invention.

Claims (1)

반도체 기억소자의 캐패시터 제조방법에 있어서, 1) 반도체기판 상에 적층된 층간절연막에 트랜치를 형성시키고, 캐패시터 접촉부위의 상기 트랜치 저면에 접촉창을 형성시키는 단계와, 2) 상기 트랜치의 측벽에 절연물질측벽을 형성시키는 단계와, 3) 상기 층간절연막과 상기 트랜치와 상기 접촉창 위에 제1도전물질층을 형성시키는 단계와, 4) 상기 제1도전물질층 위에 절연물질막을 형성시키는 단계와, 5) 상기 절연물질막을 이방성 건식식각하여 상기 트랜치 내에만 잔재되도록 하는 단계와, 6) 상기 제1도전물질층의 노출된 부위를 제거하여, 상기 층간절연막의 상부와, 상기 트랜치의 측벽에 형성된 상기 절연물질측벽 상부가 노출되도록 하면서, 상기 트랜치에만 상기 제1도전물질층이 잔재되도록 하는 단계와, 7) 상기 트랜치 내에 잔재된 상기 절연물질과, 상기 트랜치의 측벽에 형성된 상기 절연물질측벽을 제거하여, 상기 트랜치에 실린더형의 제1캐패시터전극이 형성되도록 하는 단계와, 8) 상기 제1캐패시터전극 위에 유전막을 형성시키고, 상기 유전막 위에 제2캐패시터전극을 형성시키는 단계를 포함하여 이루어지는 반도체 기억소자의 캐패시터 제조방법.1. A method of manufacturing a capacitor of a semiconductor memory device, comprising the steps of: 1) forming a trench in an interlayer insulating film stacked on a semiconductor substrate, and forming a contact window on the bottom of the trench at a capacitor contact portion; and 2) insulating a sidewall of the trench. Forming a material side wall, 3) forming a first conductive material layer over the interlayer insulating film, the trench and the contact window, 4) forming an insulating material film over the first conductive material layer, 5 Anisotropic dry etching of the insulating material film so as to remain only in the trench; and 6) removing exposed portions of the first conductive material layer to form an upper portion of the interlayer insulating film and the insulation formed on sidewalls of the trench. Allowing the upper portion of the material side wall to be exposed, leaving the first conductive material layer only in the trench; and 7) the insulation remaining in the trench. Removing the sidewalls of the insulating material formed on the sidewalls of the trench and forming a cylindrical first capacitor electrode in the trench; and 8) forming a dielectric film on the first capacitor electrode and over the dielectric film. A method of manufacturing a capacitor of a semiconductor memory device comprising the step of forming a second capacitor electrode. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950047818A 1995-12-08 1995-12-08 Capacitor fabrication method of semiconductor device KR0171097B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950047818A KR0171097B1 (en) 1995-12-08 1995-12-08 Capacitor fabrication method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950047818A KR0171097B1 (en) 1995-12-08 1995-12-08 Capacitor fabrication method of semiconductor device

Publications (2)

Publication Number Publication Date
KR970053994A true KR970053994A (en) 1997-07-31
KR0171097B1 KR0171097B1 (en) 1999-02-01

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487916B1 (en) * 1997-12-31 2005-11-21 주식회사 하이닉스반도체 Capacitor Formation Method of Semiconductor Device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487916B1 (en) * 1997-12-31 2005-11-21 주식회사 하이닉스반도체 Capacitor Formation Method of Semiconductor Device

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Publication number Publication date
KR0171097B1 (en) 1999-02-01

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