KR970017620A - 사이리스터를 구비한 반도체집적회로 - Google Patents

사이리스터를 구비한 반도체집적회로 Download PDF

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Publication number
KR970017620A
KR970017620A KR1019960039610A KR19960039610A KR970017620A KR 970017620 A KR970017620 A KR 970017620A KR 1019960039610 A KR1019960039610 A KR 1019960039610A KR 19960039610 A KR19960039610 A KR 19960039610A KR 970017620 A KR970017620 A KR 970017620A
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South Korea
Prior art keywords
thyristor
semiconductor integrated
integrated circuit
mosfet
electrode
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KR1019960039610A
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English (en)
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KR100218587B1 (ko
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미쯔루 마리야마
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쯔지 하루오
샤프 가부시끼가이샤
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/39Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using thyristors or the avalanche or negative resistance type, e.g. PNPN, SCR, SCS, UJT
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1443Devices controlled by radiation with at least one potential jump or surface barrier
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/78Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
    • H03K17/79Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled controlling bipolar semiconductor switches with more than two PN-junctions, or more than three electrodes, or more than one electrode connected to the same conductivity region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • H01L2924/13033TRIAC - Triode for Alternating Current - A bidirectional switching device containing two thyristor structures with common gate contact
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Thyristors (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Light Receiving Elements (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

dv/dt 클램프 회로는 사이리스터(60)의 제어전극을 트리거하기 위한 포토트랜지스터(48)의 베이스에 접속되어, 오동작을 방지한다. dV/dt 클램프 회로(70)내의 MOSFET(71)의 게이트에는 고내압 콘텐서(72)를 통해 사이리스터(60)의 제어전극전압이 인가된다. MOSFET(71)의 게이트 전극전압은 제너 다이오드(73) 및 저항(74)의 제너저항 및 저항값을 조정함에 의해, 지속적으로 임계전압 이상으로 보유할 수 있다. 고 dV/dt에 의해 MOSFET(71)가 고속으로 동작되어 드레인과 소스간이 도통됨으로써, 포토트랜지스터(48)는 사이리스터(60)를 트리거하지 않고. 따라서 오동작을 방지할 수 있다.

Description

사이리스터를 구비한 반도체집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예의 개략적인 평면도,
제3도는 제1도의 실시예의 개략적인 등가회로를 나타낸 전기 회로도.

Claims (9)

  1. 사이리스터와 그의 게이트 구동회로를 동일 반도체침상에 집적시킨 사이리스터를 구비한 반도체집적회로에 있어서, 게이트 구동회로의 입력단자들 사이에 접속된 드레인 전극 및 소스전극을 가진 MOSFET; 일단이 사이리스터의 게이트단자에, 타단이 MOSFET의 게이트 전극에 각각 접속된 콘덴서; MOSFET의 게이트 전극과 소스 전극 사이에 접속된 정전압소자; 및 MOSFET의 게이트 전극과 소스 전극 사이에서 상기 정전압 소자와 직렬로 접속된 저항을 포함하는 dv/dt 클램프 회로를 포함하는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  2. 제1항에 있어서, 상기 정전압 소자는 제너 다이오드이고, 제너 전압과 상기 저항의 저항값은 MOSFET의 게이트 전극전압을 임계값 이상으로 소정 시간이상 지속적으로 보유가능 하도록 조정되는 것을 특징으로 하는 사이리스터륵 구비한 반도체집적회로.
  3. 제1항에 있어서, 상기 콘덴서는 반도체 칩의 기판상에 반도체산화막보다 높은 유전율을 가진 유전체막을 설치함에 의해 형성되고, 상기 유전체 막의 주위에 반도체 칩의 기판과 다른 도전형의 불순물의 확산층이 배치되는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  4. 제1항에 있어서 상기 사이리스터는 2채널용 2개의 사이리스터들의 서로 반대방향으로 배열되도록 병렬접속된 쌍방향 3단자 사이리지스터로 됨을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  5. 제4항에 있어서, 상기 2채널용 사이리스터들은 동일반도체칩상에 집적되고, 각 사이리스터에 대해 게이트 구동회로 및 dV/dt 클램프 회로가 설치되는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  6. 제4항 또는 제5항에 있어서, 상기 게이트 구동회로는 제로 크로스 기능을 갖는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  7. 제1항에 있어서, 상기 게이트 구동회로내에 광제어용 수광소자를 포함하는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  8. 제7항에 있어서, 상기 수광소자는 포토트랜지스터이고, 상기 MOSFET의 드레인 전극 및 소스 전극은 포토트랜지스터의 베이스 전극 및 에미터 전극 사이에 접속되는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
  9. 제7항 또는 제8항에 있어서, 상기 반도체 칩에서 전기적으로 절연된 상태에서 사이리스터 구동용 광신호를 전달할 수 있는 발광수단을 더 포함하는 것을 특징으로 하는 사이리스터를 구비한 반도체집적회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960039610A 1995-09-11 1996-09-10 사이리스터를 구비한 반도체집적회로 KR100218587B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP95-233037 1995-09-11
JP23303795 1995-09-11
JP96-183701 1996-07-12
JP18370196A JP3495847B2 (ja) 1995-09-11 1996-07-12 サイリスタを備える半導体集積回路

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KR970017620A true KR970017620A (ko) 1997-04-30
KR100218587B1 KR100218587B1 (ko) 1999-09-01

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US (1) US5747836A (ko)
JP (1) JP3495847B2 (ko)
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DE (1) DE19636553C2 (ko)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3352349B2 (ja) * 1997-02-24 2002-12-03 シャープ株式会社 双方向サイリスタ素子
US5933042A (en) * 1997-07-01 1999-08-03 Eg&G Canada, Ltd. Active quench circuit for an avalanche current device
US6710994B1 (en) * 2000-03-01 2004-03-23 Electric Power Research Institute, Inc. Low power gate trigger circuit for controlling a silicon-controlled rectifier circuit
JP2001274402A (ja) * 2000-03-24 2001-10-05 Toshiba Corp パワー半導体装置
KR100933743B1 (ko) * 2003-11-11 2009-12-24 두산인프라코어 주식회사 릴레이 접점 과열 방지회로
US7679223B2 (en) * 2005-05-13 2010-03-16 Cree, Inc. Optically triggered wide bandgap bipolar power switching devices and circuits
US8144441B2 (en) 2006-08-30 2012-03-27 Triquint Semiconductor, Inc. Electrostatic discharge protection circuit for compound semiconductor devices and circuits
US7582887B1 (en) * 2008-04-03 2009-09-01 Eugene C. Lee Optocoupler current transfer ratio temperature compensation method and apparatus
CN101814527A (zh) * 2010-04-22 2010-08-25 复旦大学 一种使用光电子注入进行电导调制的功率器件与方法
US8947155B2 (en) * 2012-04-06 2015-02-03 Semiconductor Energy Laboratory Co., Ltd. Solid-state relay
JP6089000B2 (ja) * 2014-05-12 2017-03-01 シャープ株式会社 双方向フォトサイリスタチップ、および、ソリッドステートリレー
JP5941955B2 (ja) * 2014-09-10 2016-06-29 シャープ株式会社 フォトトライアック素子
EP3430723A4 (en) * 2016-03-15 2019-03-06 Ideal Power Inc. BIPOLAR DOUBLE-BASED CONNECTED TRANSISTORS COMPRISING PASSIVE COMPONENTS THAT PREVENT ACCIDENTAL START-UP
RU174897U1 (ru) * 2017-07-06 2017-11-09 федеральное государственное бюджетное образовательное учреждение высшего образования "Алтайский государственный технический университет им. И.И. Ползунова" (АлтГТУ) Независимый полупроводниковый ключ на транзисторе p-n-p типа
RU174898U1 (ru) * 2017-07-06 2017-11-09 федеральное государственное бюджетное образовательное учреждение высшего образования "Алтайский государственный технический университет им. И.И. Ползунова" (АлтГТУ) Независимый полупроводниковый коммутатор на транзисторе n-p-n типа
JP2020071124A (ja) * 2018-10-31 2020-05-07 オムロン株式会社 測距センサ

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4047054A (en) * 1976-08-23 1977-09-06 Rca Corporation Thyristor switching circuit
DE2922301C2 (de) * 1979-05-31 1985-04-25 Siemens AG, 1000 Berlin und 8000 München Lichtsteuerbarer Thyristor und Verfahren zu seiner Herstellung
US4535251A (en) * 1982-12-21 1985-08-13 International Rectifier Corporation A.C. Solid state relay circuit and structure
DE3345449A1 (de) * 1982-12-21 1984-07-12 International Rectifier Corp., Los Angeles, Calif. Festkoerper-wechselspannungsrelais
JPS6074678A (ja) * 1983-09-30 1985-04-26 Toshiba Corp 半導体装置
CH668667A5 (de) * 1985-11-15 1989-01-13 Bbc Brown Boveri & Cie Leistungshalbleitermodul.
JPS62122272A (ja) * 1985-11-22 1987-06-03 Toshiba Corp 半導体装置
NL8800275A (nl) * 1988-02-05 1989-09-01 Philips Nv Schakeling voor het afleiden van een gelijkspanning uit de netwisselspanning.
JPH02126677A (ja) * 1988-11-07 1990-05-15 Toshiba Corp 半導体装置
JP2932846B2 (ja) * 1992-08-24 1999-08-09 株式会社デンソー 積層型熱交換器およびその製造方法
US5424563A (en) * 1993-12-27 1995-06-13 Harris Corporation Apparatus and method for increasing breakdown voltage ruggedness in semiconductor devices

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Publication number Publication date
JPH09139521A (ja) 1997-05-27
DE19636553C2 (de) 2001-02-08
US5747836A (en) 1998-05-05
JP3495847B2 (ja) 2004-02-09
DE19636553A1 (de) 1997-03-13
KR100218587B1 (ko) 1999-09-01

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