KR970013416A - 반도체소자 및 그 제조방법 - Google Patents

반도체소자 및 그 제조방법 Download PDF

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Publication number
KR970013416A
KR970013416A KR1019950027194A KR19950027194A KR970013416A KR 970013416 A KR970013416 A KR 970013416A KR 1019950027194 A KR1019950027194 A KR 1019950027194A KR 19950027194 A KR19950027194 A KR 19950027194A KR 970013416 A KR970013416 A KR 970013416A
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South Korea
Prior art keywords
substrate
region
nitride film
oxide film
high concentration
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KR1019950027194A
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English (en)
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KR0156187B1 (ko
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김기철
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구자홍
엘지전자 주식회사
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Priority to KR1019950027194A priority Critical patent/KR0156187B1/ko
Publication of KR970013416A publication Critical patent/KR970013416A/ko
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Publication of KR0156187B1 publication Critical patent/KR0156187B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

본 발명은 반도체소자 및 그 제조방법에 관한 것으로, 소자의 동작전류 및 동작전압을 증가시킬 수 있는 MESFET구조 및 확산법을 이용하여 이를 제조하는 방법에 관한 것이다. 본 발명은 반도체기판상에 게이트전극을 형성하는 단계와, 기판 전면에 제1산화막과 제1질화막을 차례로 형성하는 단계, 상기 제1질화막 및 제1산화막을 패터닝하여 소정의 소오스 및 드레인영역의 기판부위를 노출시키는 단계, 기판전면에 제2산화막과 제2질화막을 차례로 형성하는 단계, 열처리공정을 행하여 기판 소정영역에 활성층 및 고농도 활성층영역과 고농도 도핑영역을 각각 형성하는 단계, 상기 제1산화막과 제1질화막, 제2산화막과 제2질화막을 제거하는 단계 및 상기 고농도 도핑영역 상부에 소오스전극과 드레인전극을 각각 형성하는 단계로 이루어지는 반도체소자 제조방법을 제공한다.

Description

반도체소자 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 의한 MESFET 단면구조도,
제3도는 본 발명에 의한 MESFET 제조방법을 도시한 공정순서도.

Claims (2)

  1. 반도체기판과, 상기 반도체기판상에 형성된 게이트전극, 상기 게이트전극 양측에 게이트전극과 소정간격 이격되어 각각 형성된 소오스 전극과, 드레인전극, 상기 소오스전극과 드레인전극 하부의 기판영역에 각각 형성된 고농도 도핑영역, 상기 고농도 도핑영역 사이의 상기 게이트전극 하부의 기판영역에 형성된 활성층영역 및 상기 활성층영역의 일부에 형성된 고농도 영역으로 이루어진 것을 특징으로 하는 반도체소자.
  2. 반도체기판상에 게이트전극을 형성하는 단계와, 기판 전면에 제1산화막과 제1질화막을 차례로 형성하는 단계, 상기 제1질화막 및 제1산화막을 패터닝하여 소정의 소오스 및 드레인영역의 기판부위를 노출시키는 단계, 기판전면에 제2산화막과 제2질화막을 차례로 형성하는 단계, 열처리공정을 행하여 기판 소정영역에 활성층 및 고농도 활성층영역과 고농도 도핑영역을 각각 형성하는 단계, 상기 제1산화막과 제1질화막, 제2산화막과 제2질화막을 제거하는 단계 및 상기 고농도 도핑영역 상부에 소오스전극과 드레인전극을 각각 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체소자 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950027194A 1995-08-29 1995-08-29 반도체소자 및 그 제조방법 KR0156187B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950027194A KR0156187B1 (ko) 1995-08-29 1995-08-29 반도체소자 및 그 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950027194A KR0156187B1 (ko) 1995-08-29 1995-08-29 반도체소자 및 그 제조방법

Publications (2)

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KR970013416A true KR970013416A (ko) 1997-03-29
KR0156187B1 KR0156187B1 (ko) 1998-10-15

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