KR970003488A - 반도체 소자의 금속배선 형성방법 - Google Patents

반도체 소자의 금속배선 형성방법 Download PDF

Info

Publication number
KR970003488A
KR970003488A KR1019950017487A KR19950017487A KR970003488A KR 970003488 A KR970003488 A KR 970003488A KR 1019950017487 A KR1019950017487 A KR 1019950017487A KR 19950017487 A KR19950017487 A KR 19950017487A KR 970003488 A KR970003488 A KR 970003488A
Authority
KR
South Korea
Prior art keywords
metal wiring
etching
etching process
forming
photoresist pattern
Prior art date
Application number
KR1019950017487A
Other languages
English (en)
Other versions
KR0166508B1 (ko
Inventor
설여송
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950017487A priority Critical patent/KR0166508B1/ko
Publication of KR970003488A publication Critical patent/KR970003488A/ko
Application granted granted Critical
Publication of KR0166508B1 publication Critical patent/KR0166508B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 반도체소자의 금속배선 형성방법에 관한 것으로, 반도체기판 상부에 물질층과 절연막을 형성하고 그 상부에 금속배선층을 형성한 다음, 금속배선을 형성하기 위하여 금속배선 마스크를 이용한 식각공정으로 상기 금속배선층을 식각하되, 과도식각을 수반하여 상기 금속배선층이 식각되는 부분에 많은 식각부산물을 형성하고 전체표면상부에 평탄화층을 형성함으로써 보이드의 발생을 방지하여 반도체소자의 특성 및 신뢰성을 향상시키고 반도체소자의 고집적화를 가능하게 하는 기술이다.

Description

반도체소자의 금속배선 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1D도는 본 발명의 실시예에 따른 반도체소자의 금속배선 형성방법을 도시한 단면도.

Claims (8)

  1. 반도체기판 상부에 물질층을 형성하는 공정과, 상기 물질층 상부에 절연막을 형성하는 공정과, 상기 제1절연막 상부에 금속배선층을 형성하는 공정과, 상기 금속배선층 상부에 감광막패턴을 형성하는 공정과, 상기 감광막패턴을 마스크로하는 식각공정으로 상기 금속배선층을 식각하되, 상기 식각공정시 수반되는 과도식각공정으로 식각부산물이 상기식각된 부분에 형성되는 공정과, 상기 감광막패턴을 제거하는 공정과, 전체표면상부에 층간절연막을 형성하여 평탄화시키는 공정을 포함하는 반도체소자의 금속배선 형성방법.
  2. 제1항에 있어서, 상기 금속배선층은 Ti/TiN/W/TiN의 적층구조로 형성되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
  3. 제1항에 있어서, 상기 감광막패턴은 금속배선마스크를 이용한 식각공정으로 형성되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
  4. 제3항에 있어서, 상기 식각공정은 MERIE를 이용한 건식이방성 식각공정으로 실시되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
  5. 제4항에 있어서, 상기 MERIE 식각공정은 SF6계 가스를 사용하여 실시되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
  6. 제3항에 있어서, 상기 식각공정은 상기 텅스텐이 상기 감광막패턴과 식각선택비 차이가 적은 조건에서 실시됨으로써 식각부산물이 많이 발생되도록 실시되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
  7. 제1항에 있어서, 상기 감광막패턴은 산소플라즈마를 이용하여 제거하고 상기 식각공정시 발생된 상기 감광막패턴의 부산물은 습식방법으로 제거되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
  8. 제1항에 있어서, 상기 식각부산물은 상기 과도식각 정도에 따라 조절되는 것을 특징으로 하는 반도체소자의 금속배선 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950017487A 1995-06-26 1995-06-26 반도체 소자의 금속배선 형성방법 KR0166508B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950017487A KR0166508B1 (ko) 1995-06-26 1995-06-26 반도체 소자의 금속배선 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950017487A KR0166508B1 (ko) 1995-06-26 1995-06-26 반도체 소자의 금속배선 형성방법

Publications (2)

Publication Number Publication Date
KR970003488A true KR970003488A (ko) 1997-01-28
KR0166508B1 KR0166508B1 (ko) 1999-02-01

Family

ID=19418333

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950017487A KR0166508B1 (ko) 1995-06-26 1995-06-26 반도체 소자의 금속배선 형성방법

Country Status (1)

Country Link
KR (1) KR0166508B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100549333B1 (ko) * 1998-10-02 2006-04-06 주식회사 하이닉스반도체 반도체 소자의 금속배선 형성 방법

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100454626B1 (ko) * 1997-05-07 2005-01-05 주식회사 하이닉스반도체 반도체소자의금속배선형성방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100549333B1 (ko) * 1998-10-02 2006-04-06 주식회사 하이닉스반도체 반도체 소자의 금속배선 형성 방법

Also Published As

Publication number Publication date
KR0166508B1 (ko) 1999-02-01

Similar Documents

Publication Publication Date Title
KR970003488A (ko) 반도체 소자의 금속배선 형성방법
KR970052439A (ko) 반도체 소자의 콘택 홀 형성 방법
KR980005592A (ko) 자기 정렬 콘택 홀 형성 방법
KR980006092A (ko) 반도체 소자의 소자분리막 제조방법
KR100507869B1 (ko) 반도체 소자의 콘택홀 형성 방법
KR960009105A (ko) 반도체소자의 소자분리 방법
KR100457408B1 (ko) 반도체소자의텅스텐플러그형성방법
KR970077456A (ko) 반도체 소자의 콘택 홀 형성 방법
KR100459683B1 (ko) 반도체장치의폴리실리콘패턴형성방법
KR980005524A (ko) 반도체 소자의 콘택 플러그 형성방법
KR970018216A (ko) 반도체 장치의 평탄화 방법
KR100209279B1 (ko) 반도체 소자의 콘택홀 형성방법
KR960030327A (ko) 반도체 소자의 콘택홀 형성방법
KR20030091452A (ko) 피팅 현상을 방지하는 패턴 형성 방법
KR970052386A (ko) 반도체 장치의 금속 배선 형성 방법
KR980005576A (ko) 반도체 소자의 금속층 형성 방법
KR980005513A (ko) 반도체 소자의 콘택홀 형성방법
KR980012091A (ko) 반도체 장치의 폴리사이드 형성방법
KR980005574A (ko) 반도체 소자의 비아홀 형성방법
KR970030404A (ko) 반도체 장치의 층간절연막 평탄화 방법
KR970077457A (ko) 반도체소자 제조방법
KR950015587A (ko) 반도체 소자의 콘택홀 형성방법
KR970072203A (ko) 폴리사이드 게이트 형성방법
KR980005597A (ko) 반도체 장치의 콘택홀 형성방법
KR970067652A (ko) 반도체소자의 배선막 식각방법

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20080820

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee