KR960026271A - 금속패턴 형성방법 - Google Patents

금속패턴 형성방법 Download PDF

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Publication number
KR960026271A
KR960026271A KR1019940034122A KR19940034122A KR960026271A KR 960026271 A KR960026271 A KR 960026271A KR 1019940034122 A KR1019940034122 A KR 1019940034122A KR 19940034122 A KR19940034122 A KR 19940034122A KR 960026271 A KR960026271 A KR 960026271A
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South Korea
Prior art keywords
metal layer
plasma
forming
film
pattern
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KR1019940034122A
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English (en)
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KR0172232B1 (ko
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김원길
이원건
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김주용
현대전자산업 주식회사
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Priority to KR1019940034122A priority Critical patent/KR0172232B1/ko
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Publication of KR0172232B1 publication Critical patent/KR0172232B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 금속패턴 형성방법에 관한 것으로, 반도체기판 상부에 금속층을 형성하고 상기 금속층 상부에 반사방지막을 형성한 다음, 상기 반사방지막 상부에 감광막패턴을 형성하고 상기 감광막 패턴을 마스크로 하여 상기 반사방지막을 염소분위기의 플라즈마로 식각하고, 상기 반사방지막과 금속층 계면에 형성된 절연막을 삼염화붕소 분위기의 플라즈마로 식각하고, 상기 금속층을 염소분위기의 플라즈마로 식각하고 상기 감광막패턴을 제거함으로써 상기 반도체기판에 잔유물이 남기지 않고 금속패턴을 형성하여 후속공정을 용이하게 함으로써 반도체소자의 수율을 향상시키고 반도체소자의 신뢰성을 향상시키는 기술이다.

Description

금속패턴 형성방법.
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1C도는 본 발명의 실시예에 따른 금속패턴 형성공정을 도시한 단면도.

Claims (6)

  1. 반도체기판 상부에 하부절연층을 형성하는 공정과, 상기 하부절연층 상부에 금속층을 형성하는 공정과, 상기 금속층 상부에 반사방지막을 형성하는 공정과, 상기 반사방지막 상부에 감광막패턴을 형성하는 공정과,상기 감광막패턴을 마스크로 한 건식방법으로 상기 반사방지막을 식각하는 공정과, 상기 반사방지막과 금속층의 응력에 형성된 절연막을 제거하는 공정과, 상기 감광막패턴을 마스크로 하여 상기 금속층을 식각하는 공정과, 상기 감광막패턴을 제거하는 공정을 포함하는 금속패턴 형성방법.
  2. 제1항에 있어서, 상기 건식방법은 염소분위기의 플라즈마가 이용되는 것을 특징으로 하는 금속패턴 형성방법.
  3. 제1항에 있어서, 상기 절연막 제거공정은 삼염화붕소 분위기의 플라즈마가 이용되는 것을 특징으로 하는 금속패턴 형성방법.
  4. 제1항에 있어서, 상기 절연막 제거공정은 싱글챔버에서 RF 전력은 500 내지 2000와트로 하고 압력은 100 내지 500mTorr로 하고 실시된 것을 특징으로 하는 금속패턴 형성방법.
  5. 제1항에 있어서, 상기 금속층은 알루미늄으로 형성된 것을 특징으로 하는 금속패턴 형성방법.
  6. 제1항에 있어서, 상기 금속층 제거공정은 염소분위기의 플라즈마가 이용되는 것을 특징으로 하는 금속패턴 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940034122A 1994-12-14 1994-12-14 금속패턴 형성방법 KR0172232B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940034122A KR0172232B1 (ko) 1994-12-14 1994-12-14 금속패턴 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940034122A KR0172232B1 (ko) 1994-12-14 1994-12-14 금속패턴 형성방법

Publications (2)

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KR960026271A true KR960026271A (ko) 1996-07-22
KR0172232B1 KR0172232B1 (ko) 1999-03-30

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