KR960009134A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

Info

Publication number
KR960009134A
KR960009134A KR1019950027605A KR19950027605A KR960009134A KR 960009134 A KR960009134 A KR 960009134A KR 1019950027605 A KR1019950027605 A KR 1019950027605A KR 19950027605 A KR19950027605 A KR 19950027605A KR 960009134 A KR960009134 A KR 960009134A
Authority
KR
South Korea
Prior art keywords
resin
semiconductor device
manufacturing
recess
coated
Prior art date
Application number
KR1019950027605A
Other languages
English (en)
Inventor
히데오 야마나까
Original Assignee
이데이 노브유끼
소니 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이데이 노브유끼, 소니 가부시끼가이샤 filed Critical 이데이 노브유끼
Publication of KR960009134A publication Critical patent/KR960009134A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01077Iridium [Ir]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dispersion Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Led Device Packages (AREA)

Abstract

반도체장치의 제조방법은 기대의 휘어짐의 발생을 감소시킬 수 있으며 작동에서의 신뢰성을 강화할 수 있다. 그 방법은 외부리드부와 내부리드부를 가지는 리드프레임을 준비하는 단계와; 캐비티의 성형을 위해 상측금형과 하측금형을 준비하는 단계와; 상측금형과 하측금형사이에 리드프레임의 외부리드부를 유지하며, 상측금형과 하측금형사이에 형성된 캐비티내로 용융된 수지를 사출주입하고 그 수지를 경화시키며, 그로인해 대략 중앙부에 오목부를 가지는 기대 및 오목부의 개구부 외측을 둘러싸며 기대와 프레임부 사이에 리드프레임의 내부리드부를 유지한 프레임부를 성형하는 단계와; 오목부내에 반도체소자를 적치하고, 반도체소자를 리드프레임의 내부리드에 접속하는 단계와; 반도체소자를 봉함하기 위해 오목부내에 투광성수지를 포팅하는 단계와를 포함하여 이루어진다.

Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 (A)~(C)는 본 발명에 따르는 반도체장치의 제조공정을 순서대로 설명하는 단면도로써,
제1도(A)는 클램핑공정을 나타내며,
제1도(B)는 기대 성형공정을 나타내며,
제1도(C)는 트림 및 성형공정을 각각 나타낸다.

Claims (11)

  1. 반도체장치의 제조방법에 있어서, 내부리드부와 외부리드부를 가지는 리드프레임을 준비하는 단계와, 캐비티를 형성하기 위해 상측금형과 하측금형을 준비하는 단계와, 상기 상측금형과 상기 하측금형사이에 상기 리드프레임의 상기 외부리드부를 유지하고, 상기 상측 및 하측 금형사이에 형성된 캐비티내로 용융된 수지를 사출주입시키고 그 수지를 경화시키고, 그로인해 대략 중앙부에 오목부를 가지는 기대 및 상기 오복부의 개구부 외측을 둘러싸며 상기 기대와의 사이에 상기 리드프레임의 상기 내부리드부를 유지하는 프레임부를 성형하는 단계와, 상기 오목부내에 반도체소자를 적치하고, 상기 리드프레임의 상기 내부리드에 상기 반도체소자를 접속하는 단계와, 상기 반도체소자를 봉함하기 위해 상기 오목부내로 투광성수지를 코팅하는 단계와를 포함하여 이루어지는 반도체장치의 제조방법.
  2. 제1항에 있어서, 상기 수지는 열가소성수지인 것을 특징으로 하는 반도체장치의 제조방법.
  3. 제2항에 있어서, 상기 열가소성수지는 결정성 열가소성수지, 비결정성 열가소성수지, 결정성 열가고성수지 및 비결정성 열가소성수지의 혼합물로 구성되는 일군중에 선택된 한종류인 것을 특징으로 하는 반도체장치의 제조방법.
  4. 제1항에 있어서, 상기 수지는 실리콘수지인 것을 특징으로 하는 반도체장치의 제조방법.
  5. 제4항에 있어서, 상기 실리콘수지가 액상 실리콘수지이거나 페이스트상 실리콘수지중의 하나인 것을 특징으로 하는 반도체장치의 제조방법.
  6. 제1항에 있어서, 상기 수지는 실란커플링제가 첨가된 실리콘수지인 것을 특징으로 하는 반도체장치의 제조방법.
  7. 제6항에 있어서, 상기 실리콘수지를 사출주입함에 있어서 상기 상측 및 하측금형의 내부표면이 불소수지막으로 코팅되는 것을 특징으로 하는 반도체장치의 제조방법.
  8. 제4항에 있어서, 상기 실리콘수지를 사출주입함에 있어서 상기 기대 및 상기 프레임부사이에 유지되는 상기 내부리드부의 표면이 실란커플링제로 코팅되는 것을 특징으로 하는 반도체장치의 제조방법.
  9. 제4항에 있어서, 상기 오목부내에 포팅된 상기 투광성수지의 표면이 상기 투광성수지의 경도보다 높은 경도를 가지는 전도성막으로 코팅된 것을 특징으로 하는 반도체장치의 제조방법.
  10. 제4항에 있어서, 상기 오목부내에 포팅된 상기 투광성수지의 표면이 상기 투광성수지의 경도보다 높은 경도를 가지는 광학적 무반사성막으로 코팅된 것을 특징으로 하는 반도체장치의 제조방법.
  11. 제4항에 있어서, 오목부내에 포팅된 상기 투광성수지의 표면이 상기 투광성수지의 경도보다 높은 경도를 가지는 적외선 차단막으로 코팅된 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950027605A 1994-08-31 1995-08-30 반도체장치의 제조방법 KR960009134A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP23211194A JP3417079B2 (ja) 1994-08-31 1994-08-31 半導体装置の製造方法
JP94-232111 1994-08-31

Publications (1)

Publication Number Publication Date
KR960009134A true KR960009134A (ko) 1996-03-22

Family

ID=16934184

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950027605A KR960009134A (ko) 1994-08-31 1995-08-30 반도체장치의 제조방법

Country Status (3)

Country Link
US (1) US5893723A (ko)
JP (1) JP3417079B2 (ko)
KR (1) KR960009134A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100833942B1 (ko) * 2002-07-11 2008-05-30 삼성테크윈 주식회사 리이드 프레임과 그것을 구비한 반도체 팩키지 및, 리이드프레임 제조 방법

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0961271A (ja) * 1995-08-29 1997-03-07 Mitsubishi Electric Corp 半導体式センサ及びその製造方法
JP2933036B2 (ja) * 1996-11-29 1999-08-09 日本電気株式会社 中空パッケージ
US5962810A (en) * 1997-09-09 1999-10-05 Amkor Technology, Inc. Integrated circuit package employing a transparent encapsulant
TW360935B (en) * 1997-11-14 1999-06-11 Amic Technology Inc Variable package structure and process for producing the same
US6092281A (en) 1998-08-28 2000-07-25 Amkor Technology, Inc. Electromagnetic interference shield driver and method
JP2000228467A (ja) 1998-12-02 2000-08-15 Toshiba Corp 半導体封止用樹脂組成物及び半導体装置とその製造方法
US6274927B1 (en) 1999-06-03 2001-08-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
US6448635B1 (en) 1999-08-30 2002-09-10 Amkor Technology, Inc. Surface acoustical wave flip chip
US6435946B1 (en) * 2000-07-07 2002-08-20 Agere Systems Guardian Corp. Technique for reducing slivers on optical components resulting from friction processes
SG112799A1 (en) 2000-10-09 2005-07-28 St Assembly Test Services Ltd Leaded semiconductor packages and method of trimming and singulating such packages
US6686258B2 (en) 2000-11-02 2004-02-03 St Assembly Test Services Ltd. Method of trimming and singulating leaded semiconductor packages
JP2003007946A (ja) * 2001-06-27 2003-01-10 Enomoto Co Ltd 表面実装型led用リードフレーム及びその製造方法
US6861720B1 (en) 2001-08-29 2005-03-01 Amkor Technology, Inc. Placement template and method for placing optical dies
US6891276B1 (en) 2002-01-09 2005-05-10 Bridge Semiconductor Corporation Semiconductor package device
US6989295B1 (en) 2002-01-09 2006-01-24 Bridge Semiconductor Corporation Method of making a semiconductor package device that includes an insulative housing with first and second housing portions
US7190060B1 (en) 2002-01-09 2007-03-13 Bridge Semiconductor Corporation Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same
US6936495B1 (en) 2002-01-09 2005-08-30 Bridge Semiconductor Corporation Method of making an optoelectronic semiconductor package device
US6784534B1 (en) 2002-02-06 2004-08-31 Amkor Technology, Inc. Thin integrated circuit package having an optically transparent window
KR20040033193A (ko) * 2002-10-11 2004-04-21 (주)그래픽테크노재팬 이미지 센서용 반도체 칩 패키지 및 제조 방법
JP2004146530A (ja) * 2002-10-23 2004-05-20 Mitsui Chemicals Inc 樹脂製中空パッケージ
KR101188292B1 (ko) * 2002-11-27 2012-10-09 디엠아이 바이오사이언시스, 인크 인산화 증가로 인한 질병 및 증상의 치료방법
US20050009239A1 (en) * 2003-07-07 2005-01-13 Wolff Larry Lee Optoelectronic packaging with embedded window
JP2005093463A (ja) * 2003-09-12 2005-04-07 Sanyo Electric Co Ltd ニオブ固体電解コンデンサ
JP2006119983A (ja) * 2004-10-22 2006-05-11 Renesas Technology Corp Icカードおよびその製造方法
JP4604716B2 (ja) * 2004-12-28 2011-01-05 住友化学株式会社 固体撮像素子収納ケース用組成物、固体撮像素子収納ケースおよび固体撮像装置
JP4698234B2 (ja) * 2005-01-21 2011-06-08 スタンレー電気株式会社 表面実装型半導体素子
JP4746342B2 (ja) * 2005-04-15 2011-08-10 Okiセミコンダクタ株式会社 半導体装置及びその製造方法
US8044412B2 (en) 2006-01-20 2011-10-25 Taiwan Semiconductor Manufacturing Company, Ltd Package for a light emitting element
US8629537B2 (en) * 2006-01-23 2014-01-14 Stats Chippac Ltd. Padless die support integrated circuit package system
US7449369B2 (en) * 2006-01-23 2008-11-11 Stats Chippac Ltd. Integrated circuit package system with multiple molding
JP2009111150A (ja) * 2007-10-30 2009-05-21 Mitsubishi Electric Corp モールド形避雷器およびその製造方法
DE102008001038B4 (de) * 2008-04-08 2016-08-11 Robert Bosch Gmbh Mikromechanisches Bauelement mit Schrägstruktur und entsprechendes Herstellungsverfahren
DE102008025491A1 (de) * 2008-05-28 2009-12-03 Osram Opto Semiconductors Gmbh Optoelektronisches Halbleiterbauteil und Leiterplatte
US20100289055A1 (en) * 2009-05-14 2010-11-18 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Silicone leaded chip carrier
JP2013131595A (ja) * 2011-12-21 2013-07-04 Hitachi Ltd 金属部材と樹脂の接合方法およびその接合体
JP5930566B1 (ja) 2014-09-29 2016-06-08 新電元工業株式会社 半導体パッケージの製造方法および半導体パッケージ
CN106783636A (zh) * 2016-12-10 2017-05-31 无锡中微高科电子有限公司 集成电路塑料封装的制备方法
CN114678298B (zh) * 2022-03-14 2022-09-09 珠海市众知科技有限公司 一种集成电路块引脚封装装置
CN115472539A (zh) * 2022-09-07 2022-12-13 苏州东昊塑胶五金有限公司 一种托盘结构及托盘结构的包胶工艺

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3622419A (en) * 1969-10-08 1971-11-23 Motorola Inc Method of packaging an optoelectrical device
US4318939A (en) * 1980-08-21 1982-03-09 Western Electric Co., Incorporated Stabilized catalyzed organopolysiloxanes
US4675767A (en) * 1983-12-12 1987-06-23 Canon Kabushiki Kaisha Opto-magnetic recording medium
JPH0791446B2 (ja) * 1987-03-31 1995-10-04 株式会社東芝 樹脂封止半導体装置
US4888449A (en) * 1988-01-04 1989-12-19 Olin Corporation Semiconductor package
JPH0229308A (ja) * 1988-07-19 1990-01-31 Nippon Zeon Co Ltd 反応射出成形方法
MY104152A (en) * 1988-08-12 1994-02-28 Mitsui Chemicals Inc Processes for producing semiconductor devices.
JPH02229858A (ja) * 1988-11-12 1990-09-12 Kureha Chem Ind Co Ltd 電子部品封止用樹脂組成物および封止電子部品
FR2670199B1 (fr) * 1990-12-06 1993-01-29 Saint Gobain Vitrage Int Procede de formation d'une couche a base d'oxyde d'aluminium sur du verre, produit obtenu et son utilisation dans des vitrages a couche conductrice.
US5179284A (en) * 1991-08-21 1993-01-12 General Electric Company Solid state radiation imager having a reflective and protective coating
JP2580913B2 (ja) * 1991-10-23 1997-02-12 信越化学工業株式会社 熱可塑性樹脂−シリコーンゴム成型体及びその製造方法
US5554569A (en) * 1994-06-06 1996-09-10 Motorola, Inc. Method and apparatus for improving interfacial adhesion between a polymer and a metal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100833942B1 (ko) * 2002-07-11 2008-05-30 삼성테크윈 주식회사 리이드 프레임과 그것을 구비한 반도체 팩키지 및, 리이드프레임 제조 방법

Also Published As

Publication number Publication date
JP3417079B2 (ja) 2003-06-16
US5893723A (en) 1999-04-13
JPH0878561A (ja) 1996-03-22

Similar Documents

Publication Publication Date Title
KR960009134A (ko) 반도체장치의 제조방법
US4663833A (en) Method for manufacturing IC plastic package with window
US6358773B1 (en) Method of making substrate for use in forming image sensor package
KR100929054B1 (ko) 수지 밀봉 방법, 수지 밀봉 장치, 반도체 장치의 제조방법, 반도체 장치 및 수지 재료
US4812420A (en) Method of producing a semiconductor device having a light transparent window
EP0354800A3 (en) Processes for producing semiconductor devices
KR940022807A (ko) 반도체장치 및 반도체장치용 금형
CA2203114A1 (en) Injection of encapsulating material on an optocomponent
KR910007095A (ko) 수지밀봉용 금형 및 이를 이용하여 수지를 밀봉하는 반도체 장치의 제조방법
KR20100016402A (ko) 광전 소자의 제조 방법 및 광전 소자
ES2013288B3 (es) Metodo de fabricacion de una tapa plastica o de resina sintetica, molde a este efecto y tapa obtenida con dicho metodo.
KR890011063A (ko) 진동발생소자를 가진 밀봉부품의 제조방법
TW334605B (en) Resin-sealed semiconductor device and manufacture thereof
JPH0653554A (ja) 光半導体デバイス
JPH07176795A (ja) ポッティング樹脂によるチップledのレンズ形成方法
US6696006B2 (en) Mold for flashless injection molding to encapsulate an integrated circuit chip
TW531852B (en) Optical components package and the method fabricating the same
JPS6216683A (ja) 固体撮像素子とその製造方法
JPS56103483A (en) Manufacture of semiconductor device for photoelectric conversion
JPH04329680A (ja) 発光装置
GB9121541D0 (en) Encapsulating semiconductor devices
JPS60206185A (ja) 半導体製造装置
JPH0524675B2 (ko)
JPS5664446A (en) Method of molding synthetic resin insert for metal terminal, metal terminal and mold
JPH04157759A (ja) 光学半導体装置及び該装置の成型方法

Legal Events

Date Code Title Description
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid