KR960009100B1 - Manufacturing method of minute contact hole for highly integrated device - Google Patents

Manufacturing method of minute contact hole for highly integrated device Download PDF

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Publication number
KR960009100B1
KR960009100B1 KR93002955A KR930002955A KR960009100B1 KR 960009100 B1 KR960009100 B1 KR 960009100B1 KR 93002955 A KR93002955 A KR 93002955A KR 930002955 A KR930002955 A KR 930002955A KR 960009100 B1 KR960009100 B1 KR 960009100B1
Authority
KR
South Korea
Prior art keywords
oxide layer
forming
etching
layer
doped oxide
Prior art date
Application number
KR93002955A
Other languages
English (en)
Other versions
KR940022786A (ko
Inventor
Sung-Wook Park
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Priority to KR93002955A priority Critical patent/KR960009100B1/ko
Priority to US08/202,556 priority patent/US5368682A/en
Priority to JP6032410A priority patent/JP2667360B2/ja
Publication of KR940022786A publication Critical patent/KR940022786A/ko
Application granted granted Critical
Publication of KR960009100B1 publication Critical patent/KR960009100B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
KR93002955A 1993-03-02 1993-03-02 Manufacturing method of minute contact hole for highly integrated device KR960009100B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR93002955A KR960009100B1 (en) 1993-03-02 1993-03-02 Manufacturing method of minute contact hole for highly integrated device
US08/202,556 US5368682A (en) 1993-03-02 1994-02-28 Method for forming contact hole in highly integrated semiconductor device
JP6032410A JP2667360B2 (ja) 1993-03-02 1994-03-02 半導体装置のコンタクトホール形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93002955A KR960009100B1 (en) 1993-03-02 1993-03-02 Manufacturing method of minute contact hole for highly integrated device

Publications (2)

Publication Number Publication Date
KR940022786A KR940022786A (ko) 1994-10-21
KR960009100B1 true KR960009100B1 (en) 1996-07-10

Family

ID=19351432

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93002955A KR960009100B1 (en) 1993-03-02 1993-03-02 Manufacturing method of minute contact hole for highly integrated device

Country Status (3)

Country Link
US (1) US5368682A (ko)
JP (1) JP2667360B2 (ko)
KR (1) KR960009100B1 (ko)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5464794A (en) * 1994-05-11 1995-11-07 United Microelectronics Corporation Method of forming contact openings having concavo-concave shape
US5874359A (en) * 1995-04-27 1999-02-23 Industrial Technology Research Institute Small contacts for ultra large scale integration semiconductor devices without separation ground rule
US5851923A (en) * 1996-01-18 1998-12-22 Micron Technology, Inc. Integrated circuit and method for forming and integrated circuit
US5795822A (en) * 1996-08-07 1998-08-18 Vanguard International Semiconductor Corporation Method for manufacturing an aligned opening in an integrated circuit
JP3430091B2 (ja) 1999-12-01 2003-07-28 Ｎｅｃエレクトロニクス株式会社 エッチングマスク及びエッチングマスクを用いたコンタクトホールの形成方法並びにその方法で形成した半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654113A (en) * 1984-02-10 1987-03-31 Fujitsu Limited Process for fabricating a semiconductor device
JPS6184024A (ja) * 1984-10-02 1986-04-28 Nec Corp 半導体装置の製造方法
JPS6236827A (ja) * 1985-08-10 1987-02-17 Nippon Gakki Seizo Kk 選択エツチング方法
JPS6255938A (ja) * 1985-09-05 1987-03-11 Matsushita Electronics Corp 半導体装置の製造方法
JPS63177523A (ja) * 1987-01-19 1988-07-21 Matsushita Electric Ind Co Ltd コンタクトホ−ル形成方法
JPH01274452A (ja) * 1988-04-26 1989-11-02 Fujitsu Ltd 半導体装置の製造方法
KR920004541B1 (ko) * 1989-05-30 1992-06-08 현대전자산업 주식회사 반도체 소자에서 식각베리어층을 사용한 콘택홀 형성방법
US5275972A (en) * 1990-02-19 1994-01-04 Matsushita Electric Industrial Co., Ltd. Method for fabricating a semiconductor integrated circuit device including the self-aligned formation of a contact window
JP2545154B2 (ja) * 1990-06-04 1996-10-16 松下電器産業株式会社 コンタクト構造の形成方法
US5166088A (en) * 1990-07-03 1992-11-24 Sharp Kabushiki Kaisha Method of manufacturing semiconductor device contact vias in layers comprising silicon nitride and glass
KR950000660B1 (ko) * 1992-02-29 1995-01-27 현대전자산업 주식회사 고집적 소자용 미세콘택 형성방법
US5269880A (en) * 1992-04-03 1993-12-14 Northern Telecom Limited Tapering sidewalls of via holes

Also Published As

Publication number Publication date
KR940022786A (ko) 1994-10-21
US5368682A (en) 1994-11-29
JPH06349789A (ja) 1994-12-22
JP2667360B2 (ja) 1997-10-27

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