KR960009083A - Solder Paste for Ball Grid Array - Google Patents

Solder Paste for Ball Grid Array Download PDF

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Publication number
KR960009083A
KR960009083A KR1019950023486A KR19950023486A KR960009083A KR 960009083 A KR960009083 A KR 960009083A KR 1019950023486 A KR1019950023486 A KR 1019950023486A KR 19950023486 A KR19950023486 A KR 19950023486A KR 960009083 A KR960009083 A KR 960009083A
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South Korea
Prior art keywords
alloy powder
tin
lead
solder paste
ball grid
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KR1019950023486A
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Korean (ko)
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KR0179709B1 (en
Inventor
우쓰노미야 마사히데
히로세 요우이찌
와따나베 마사따까
Original Assignee
마꼬또 무라따
쇼와 덴코 카부시키카이샤
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Publication of KR960009083A publication Critical patent/KR960009083A/en
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Publication of KR0179709B1 publication Critical patent/KR0179709B1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

조성이 서로 다르고, 그의 액상선 온도가 재유동 온도보다 낮은 두가지 이상의 합금 분말로 이루어지고, 여기서 상기 합금 분말 중 적어도 한가지는 액상선 온도와 고상선 온도차가 10℃ 이상이며, 전체 합금 분말의 평균조성이 58 내지 65중량%의 주석과 35-42중량%의 납 또는 60-65중량%의 주석과 34-38중량%의 납, 및 1-3중량%의 은으로 이루어진 것인 합금 분말 혼합물과 융제를 혼연시킴으로써 생산된 땜납 페이스트를 사용하여 고수율로 볼 그리드 어레이용 고품질 돌기를 제조할 수 있다.The composition is composed of two or more alloy powders having different compositions and having a liquidus temperature lower than the reflow temperature, wherein at least one of the alloy powders has a liquidus temperature and a solidus temperature difference of 10 ° C. or more, and an average composition of all alloy powders. An alloy powder mixture and flux comprising 58 to 65 wt% tin and 35 to 42 wt% lead or 60 to 65 wt% tin and 34 to 38 wt% lead and 1-3 wt% silver The solder paste produced by kneading can be used to produce high quality protrusions for ball grid arrays in high yield.

Description

볼 그리드 어레이용 땜납 페이스트Solder Paste for Ball Grid Array

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 볼 그리드 어레이의 일 구체예의 평면도이고,1 is a plan view of one embodiment of a ball grid array according to the invention,

제2도는 a-a′ 단편의 일부를 나타내며,2 shows part of the a-a 'fragment,

제3도는 반도체 패키지의 일례를 보여준다.3 shows an example of a semiconductor package.

Claims (15)

조성이 각기 다르고, 그의 액상선 온도가 재유동 온도보다 낮은 두가지 이상의 합금 분말로 이루어지고, 여기서 상기 합금 분말 중 적어도 한가지는 액상선 온도와 고상선 온도차가 10℃ 이상이며, 전체 합금 분말의 평균조성이 58-65중량%의 주석과 35-42중량%의 납으로 이루어진 합금 분말과 융재와의 혼합물로 된 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The composition is composed of two or more alloy powders having different compositions and their liquidus temperature lower than the reflow temperature, wherein at least one of the alloy powders has a liquidus temperature and a solidus temperature difference of 10 ° C or more, and an average composition of all alloy powders. A projection-forming solder paste for a ball grid array comprising a mixture of an alloy powder consisting of 58-65 wt% tin and 35-42 wt% lead and a melt. 제1항에 있어서, 상기 합금 분말 혼합물이 45-60중량%의 주석과 40-55중량%의 납을 함유하는 합금 분말과 70-100중량%의 주석과 0-30중량%의 납을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder mixture of claim 1, wherein the alloy powder mixture contains 45-60 wt% tin and 40-55 wt% lead, and 70-100 wt% tin and 0-30 wt% lead. A projection-forming solder paste for an array of ball grids characterized by consisting of alloy powder. 제1항에 있어서, 상기 합금 분말 혼합물이 50-60중량%의 주석과 40-50중량%의 납을 함유하는 합금 분말과 70-85중량%의 주석과 15-30중량%의 납을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder mixture of claim 1, wherein the alloy powder mixture contains 50-60 wt% tin and 40-50 wt% lead, and 70-85 wt% tin and 15-30 wt% lead. A projection-forming solder paste for an array of ball grids characterized by consisting of alloy powder. 제1항에 있어서, 상기 합금 분말 혼합물이 45-60중량%의 주석과 40-55중량%의 납을 함유하는 합금 분말, 70-100중량%의 주석과 0-30중량%의 납을 함유하는 합금 분말 및 58-65중량%의 주석과 35-42중량%의 납을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder mixture of claim 1, wherein the alloy powder mixture contains 45-60 wt% tin and 40-55 wt% lead, 70-100 wt% tin and 0-30 wt% lead. A projection-forming solder paste for a ball grid array characterized by consisting of an alloy powder and an alloy powder containing 58-65 wt% tin and 35-42 wt% lead. 제1항에 있어서, 상기 합금 분말 혼합물이 50-60중량%의 주석과 40-50중량%의 납을 함유하는 합금 분말, 70-85중량%의 주석과 15-30중량%의 납을 함유하는 합금 분말 및 58-65중량%의 주석과 35-42중량%의 납을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder mixture of claim 1, wherein the alloy powder mixture contains 50-60 wt% tin and 40-50 wt% lead, 70-85 wt% tin and 15-30 wt% lead A projection-forming solder paste for a ball grid array characterized by consisting of an alloy powder and an alloy powder containing 58-65 wt% tin and 35-42 wt% lead. 제1항 내지 5항 중 어느 한 항에 있어서, 상기 재유동 온도가 210℃ 내지 240℃ 범위인 것이 특징인 볼그리드 어레이용 돌기-형성 땜납 페이스트.The protrusion-forming solder paste for a ball grid array according to any one of claims 1 to 5, wherein the reflow temperature is in the range of 210 ° C to 240 ° C. 제6항에 있어서, 상기 재유동 온도가 약230℃인 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.7. The protrusion-forming solder paste of claim 6, wherein the reflow temperature is about 230 < 0 > C. 조성이 서로 다르고, 그의 액상선 온도가 재유동 온도보다 낮은 두가지 이상의 합금 분말로 이루어지고, 여기서 상기 합금 분말 중 적어도 한가지는 액상선 온도와 고상선 온도차가 10℃ 이상이며, 전체 합금 분말의 평균조성이 60-65중량%의 주석, 34-38중량%의 납, 및 1-3중량%의 은으로 이루어진 합금 분말과 융제와의 혼합물로 된 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The composition is composed of two or more alloy powders having different compositions and having a liquidus temperature lower than the reflow temperature, wherein at least one of the alloy powders has a liquidus temperature and a solidus temperature difference of 10 ° C. or more, and an average composition of all alloy powders. A projection-forming solder paste for a ball grid array comprising a mixture of an alloy powder and a flux consisting of 60-65 wt% tin, 34-38 wt% lead, and 1-3 wt% silver. 제8항에 있어서, 상기 합금 분말 혼합물이 45-60중량%의 주석, 40-55중량%의 납 및 0-3중량%의 은을 함유하는 합금 분말과 70-100중량%의 주석, 0-30중량%의 납과 0-3중량%의 은을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder of claim 8, wherein the alloy powder mixture comprises 45-60 wt% tin, 40-55 wt% lead and 0-3 wt% silver and 70-100 wt% tin, 0- A projection-forming solder paste for a ball grid array, characterized by consisting of an alloy powder containing 30 weight percent lead and 0-3 weight percent silver. 제8항에 있어서, 상기 합금 분말 혼합물이 50-60중량%의 주석, 40-50중량%의 납 및 0-3중량%의 은을 함유하는 함금 분말과 70-85중량%의 주석, 15-30중량%의 납 및 0-3중량%의 은을 함유하는 합금 분말로 이루어지진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 ㅍ이스트.9. The alloy powder mixture of claim 8, wherein the alloy powder mixture comprises 50-60 wt% tin, 40-50 wt% lead and 0-3 wt% silver and 70-85 wt% tin, 15- A projection-forming solder paste for a ball grid array characterized by consisting of an alloy powder containing 30 weight percent lead and 0-3 weight percent silver. 제8항에 있어서, 상기 합금 분말 혼합물이 45-60중량%의 주석, 40-55중량%의 납 및 0-3중량%의 은을 함유하는 합금 분말, 70-100중량%의 주석, 0-30중량%의 납 및 0-3중량%의 은을 함유하는 합금 분말 및 60-65중량%의 주석과 34-38중량%의 납 및 1-3중량%의 은을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder of claim 8, wherein the alloy powder mixture comprises 45-60 wt% tin, 40-55 wt% lead and 0-3 wt% silver, 70-100 wt% tin, 0- Consisting of an alloy powder containing 30% lead and 0-3% silver and an alloy powder containing 60-65% tin and 34-38% lead and 1-3% silver Featured projection-forming solder paste for ball grid arrays. 제8항에 있어서, 상기 합금 분말 혼함물이 50-60중량%의 주석, 40-50중량%의 납 및 0-3중량%의 은을 함유하는 합금 분말, 70-85중량%의 주석, 15-30중량%의 납 및 0-3중량%의 은을 함유하는 합금 분말 및 60-65중량%의 주석, 34-38중량%의 납 및 1-3중량%의 은을 함유하는 합금 분말로 이루어진 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.The alloy powder of claim 8, wherein the alloy powder mixture comprises 50-60 wt% tin, 40-50 wt% lead and 0-3 wt% silver, 70-85 wt% tin, 15 Consisting of an alloy powder containing -30 weight percent lead and 0-3 weight percent silver and an alloy powder containing 60-65 weight percent tin, 34-38 weight percent lead and 1-3 weight percent silver Projection-forming solder paste for a ball grid array. 제8항 내지 12항 중 어느 한 항에 있어서, 상기 재유동 온도가 210℃ 내지 240℃ 범위인 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.13. The protrusion-forming solder paste for a ball grid array according to any one of claims 8 to 12, wherein the reflow temperature is in the range of 210 ° C to 240 ° C. 제13항에 있어서, 상기 재유동 온도가 약 230℃인 것이 특징인 볼 그리드 어레이용 돌기-형성 땜납 페이스트.14. The protrusion-forming solder paste of claim 13, wherein the reflow temperature is about 230 < 0 > C. 제1항 내지 14항에 따른 땜납 페이스트 중 어느 하나를 이용하여 형성된 돌기를 갖는 볼 그리드 어레이.A ball grid array having protrusions formed using any one of the solder pastes according to claim 1. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950023486A 1994-08-02 1995-07-31 Solder ball paste for ball grid array and ball grid array using the paste KR0179709B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP18158294 1994-08-02
JP181582/1994 1994-08-02

Publications (2)

Publication Number Publication Date
KR960009083A true KR960009083A (en) 1996-03-22
KR0179709B1 KR0179709B1 (en) 1999-04-15

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CN (1) CN1052179C (en)
SG (1) SG38859A1 (en)
TW (1) TW311894B (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006075459A1 (en) * 2005-01-11 2006-07-20 Murata Manufacturing Co., Ltd Solder paste and electronic device
CN102642096A (en) * 2011-02-18 2012-08-22 苏州宇邦新型材料有限公司 Solder, tin-plated solder strip adopting solder and preparation methods of solder and tin-plated solder strip
FR3049155B1 (en) * 2016-03-15 2018-04-13 Alstom Transport Technologies ELECTRONIC CARD COMPRISING AN INTERCALAR CIRCUIT WITH METALLIZED HALF-HOLES
CN106024363B (en) * 2016-08-04 2018-11-09 重庆金籁科技股份有限公司 A kind of production method and SMD chip inductors of SMD chip inductors
CN113182726A (en) * 2021-04-07 2021-07-30 河南鸿昌电子有限公司 Soldering tin for welding semiconductor and use method of soldering tin

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4739917A (en) * 1987-01-12 1988-04-26 Ford Motor Company Dual solder process for connecting electrically conducting terminals of electrical components to printed circuit conductors
JPH01274491A (en) * 1988-04-26 1989-11-02 Aiwa Co Ltd Substrate device using non-eutectic solder
JP2512108B2 (en) * 1988-10-26 1996-07-03 松下電器産業株式会社 Cream Handa

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CN1052179C (en) 2000-05-10
KR0179709B1 (en) 1999-04-15
CN1126647A (en) 1996-07-17
TW311894B (en) 1997-08-01
SG38859A1 (en) 1997-04-17

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