KR960002643A - 반도체소자의 제조방법 - Google Patents

반도체소자의 제조방법 Download PDF

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Publication number
KR960002643A
KR960002643A KR1019940013734A KR19940013734A KR960002643A KR 960002643 A KR960002643 A KR 960002643A KR 1019940013734 A KR1019940013734 A KR 1019940013734A KR 19940013734 A KR19940013734 A KR 19940013734A KR 960002643 A KR960002643 A KR 960002643A
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KR
South Korea
Prior art keywords
semiconductor device
carbon
manufacturing
reflection film
forming
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Application number
KR1019940013734A
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English (en)
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KR100323442B1 (ko
Inventor
이헌철
김석우
박해성
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019940013734A priority Critical patent/KR100323442B1/ko
Publication of KR960002643A publication Critical patent/KR960002643A/ko
Application granted granted Critical
Publication of KR100323442B1 publication Critical patent/KR100323442B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02115Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체소자의 제조방법에 관한 것으로, 종래 기술에서 별도의 증착장비를 이용하여 반사방지막을 형성하고 패턴 형성후에 별도의 식각공정을 추가하여 제거함으로써 발생되는 단가상승으로 인하여 생산성이 저하된다. 따라서, 본 발명은 일반적인 증착공정이나 식각공정시 사용되는 높은 밀도의 플라즈마 반응기에서 카본을 함유한 가스를 이용하여 반사방지막을 형성하고 패턴 형성후에 감광막패턴 제거시 동시에 제거함으로써 반도체소자의 생산단가를 절감시켜 반도체소자의 생산성을 향상시키는 기술이다.

Description

반도체소자의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (5)

  1. 반도체소자의 제조방법에 있어서, 반응기 내부에 일정온도의 실리콘으로 전극을 형성하고 상기 반응기에 카본을 함유하는 가스를 유입시켜 카본과 자유불소로 분리시키는 공정과, 상기 자유불소는 상기 전극과 모두 결합시킨 다음, 상기 카본으로 형성된 폴리머를 금속층 상부에 일정두께 증착하여 반사방지막을 형성하는 공정과, 상기 반사방지막 상부에 감광막패턴을 형성하고 상기 감광막패턴을 마스로하여 상기 금속층을 패터닝한 다음, 상기 감광막패턴과 반사방지막을 동시에 제거하는 공정을 포함하는 반도체소자의 제조방법.
  2. 제1항에 있어서, 상기 일정온도는 100℃-300℃로 하는 것을 특징으로 하는 반도체소자의 제조방법.
  3. 제1항에 있어서, 상기 카본을 함유하는 가스는 C2F6, C3F8또는 C4F8를 사용하는 것을 특징으로 하는 반도체소자의 제조방법.
  4. 제1항에 있어서, 상기 반사방지막은 카본만으로 형성된 폴리머인 비정질카본막으로 형성하는 것을 특징으로 하는 반도체소자의 제조방법.
  5. 제1항에 있어서, 상기 반사방지막은 감광막패턴 제거시 산소플라즈마의 산소와 반응시켜 제거하는 것을 특징으로 하는 반도체소자의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940013734A 1994-06-17 1994-06-17 반도체소자의제조방법 KR100323442B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940013734A KR100323442B1 (ko) 1994-06-17 1994-06-17 반도체소자의제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940013734A KR100323442B1 (ko) 1994-06-17 1994-06-17 반도체소자의제조방법

Publications (2)

Publication Number Publication Date
KR960002643A true KR960002643A (ko) 1996-01-26
KR100323442B1 KR100323442B1 (ko) 2002-05-13

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KR1019940013734A KR100323442B1 (ko) 1994-06-17 1994-06-17 반도체소자의제조방법

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990019538A (ko) * 1997-08-29 1999-03-15 윤종용 하이드로 카본계의 가스를 사용한 반사방지막 형성방법
KR100275133B1 (ko) * 1997-12-30 2000-12-15 김영환 반도체장치제조방법
KR100307629B1 (ko) * 1999-04-30 2001-09-26 윤종용 하이드로 카본계의 가스를 이용한 반사방지막의 형성 및 적용방법
KR100301272B1 (ko) * 1997-08-25 2001-10-19 포만 제프리 엘 반사방지코팅층박막및그제조공정

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100301272B1 (ko) * 1997-08-25 2001-10-19 포만 제프리 엘 반사방지코팅층박막및그제조공정
KR19990019538A (ko) * 1997-08-29 1999-03-15 윤종용 하이드로 카본계의 가스를 사용한 반사방지막 형성방법
KR100275133B1 (ko) * 1997-12-30 2000-12-15 김영환 반도체장치제조방법
KR100307629B1 (ko) * 1999-04-30 2001-09-26 윤종용 하이드로 카본계의 가스를 이용한 반사방지막의 형성 및 적용방법

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Publication number Publication date
KR100323442B1 (ko) 2002-05-13

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