KR950034495A - 반도체 장치 제조를 위한 고 수율 광 경화 공정 - Google Patents
반도체 장치 제조를 위한 고 수율 광 경화 공정 Download PDFInfo
- Publication number
- KR950034495A KR950034495A KR1019950009182A KR19950009182A KR950034495A KR 950034495 A KR950034495 A KR 950034495A KR 1019950009182 A KR1019950009182 A KR 1019950009182A KR 19950009182 A KR19950009182 A KR 19950009182A KR 950034495 A KR950034495 A KR 950034495A
- Authority
- KR
- South Korea
- Prior art keywords
- low
- curing
- dielectric material
- depositing
- lamp
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 8
- 238000000034 method Methods 0.000 title claims abstract 21
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000016 photochemical curing Methods 0.000 title 1
- 239000003989 dielectric material Substances 0.000 claims abstract 15
- 238000000151 deposition Methods 0.000 claims abstract 9
- 238000010438 heat treatment Methods 0.000 claims abstract 6
- 229910052736 halogen Inorganic materials 0.000 claims abstract 4
- 230000005855 radiation Effects 0.000 claims abstract 4
- 230000003595 spectral effect Effects 0.000 claims abstract 4
- 229910052721 tungsten Inorganic materials 0.000 claims abstract 4
- 239000010937 tungsten Substances 0.000 claims abstract 4
- -1 tungsten halogen Chemical class 0.000 claims abstract 4
- 229910052751 metal Inorganic materials 0.000 claims abstract 2
- 239000002184 metal Substances 0.000 claims abstract 2
- 239000010410 layer Substances 0.000 claims 9
- 239000000463 material Substances 0.000 claims 7
- 241000269627 Amphiuma means Species 0.000 claims 1
- 239000004642 Polyimide Substances 0.000 claims 1
- 239000011521 glass Substances 0.000 claims 1
- 150000002894 organic compounds Chemical class 0.000 claims 1
- 229920001721 polyimide Polymers 0.000 claims 1
- 239000011241 protective layer Substances 0.000 claims 1
- 230000003287 optical effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Heating, Cooling, Or Curing Plastics Or The Like In General (AREA)
Abstract
본 발명은 반도체 장치 및 이를 위한 시스템에서 낮은 k 유전 물질을 경화하는 방법이다. 이 방법은 금속 상호접속선을 증착하는 단계, 낮은 K 유전 물질층을 상기 선위에 증착하는 단계, 및 낮은 k 유전 물질은 10분 미만동안 가열 램프로 광학적으로 경화하는 단계를 포함하고, 상기 가열 램프는 파장에 있어 약 1미크론 내지 3.6미크론의 적외선 스펙트럼 범위의 광 복사 에너지를 제공한다. 이 가열 램프는 텅스텐 할로겐 램프이다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1-5도는 양호한 실시예의 서로 다른 단계들하에서의 반도체 장치의 단면도.
Claims (16)
- 반도체 장치의 물질 층을 경화하는 방법에 있어서, a. 반도체층을 증착하는 단계, b. 낮은 k 유전 물질층을 상기 반도체층 위에 증착하는 단계, 및 c. 상기 낮은k 유전 물질층을 10분 미만 동안 가열 램프로 경화하는 단계를 포함하여, 상기 램프는 상기 낮은 k 유전 물질층에 모든 요구된 경화를 실질적으로 제공하고 상기 반도체층은 상기 낮은 k 유전 물질보다 실질적으로 낮은 온도를 갖는 것을 특징으로하는 방법.
- 제1항에 있어서, 상기 낮은 k 물질은 폴리메릭 스핀 온 글래스인 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 낮은 k 물질은 폴리이미드이고, 상기 경화 시간은 5분 미만인 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 낮은 k 물질은 유기 화합물로 구성된 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 경화는 상기 램프에 의해 제공되는 복사 에너지에 의해 수행되는 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 방법은 단일 웨이퍼 처리를 더 포함하는 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 방법은 조립 라인 공정의 단일 웨이퍼 처리를 더 포함하는 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 낮은 k 물질의 상기 경화는 텅스텐 할로겐 램프에 의해 이루어지는 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 경화는 파장에 있어 약 1미크론 내지 3.5미크론의 적외선 스펙트럼 범위의 광 복사 에너지를 포함하는 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 방법은 상기 경화 전에 상기 낮은 k 유전 물질위에 보호층을 증착하는 단계를 더 포함하는 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 방법은 상기 경화 전에 상기 낮은 k 물질위에 제2의 낮은 k 유전 물질을 증착하는 단계를 더 포함하는 것을 특징으로 하는 방법.
- 반도체 장치에서 낮은 k 유전 물질층을 경화하는 방법에 있어서, a. 금속 상호접속선들을 증착하는 단계, b. 낮은 k 유전 물질층을 상기 상호접속선들 위에 증착하는 단계, 및 c. 상기 낮은 k 유전 물질을 10분 미만 동안 가열 램프로 광학적으로 경화하는 단계를 포함하고, 상기 가열 램프는 파장에 있어 약1미크론 내지 3.6미크론의 적외선 스펙트럼 범위의 광 복사 에너지를 제공하는 것을 특징으로 하는 방법.
- 제12항에 있어서, 상기 낮은 k 물질의 상기 경화는 텅스텐 할로겐 램프에 의해 이루어지는 것을 특징으로 하는 방법.
- 유전 물질을 경화하는 시스템에 있어서, a. 유전 물질을 증착하는 수단, 및 b. 상기 유전 물질을 경화하는 가열 램프를 포함하는 것을 특징으로 하는 방법.
- 제14항에 있어서, 상기 가열 램프는 파장에 있어 약 1미크론 내지 3.5미크론의 적외선 스펙트럼 범위의 광복사 에너지를 제공하는 것을 특징으로 하는 방법.
- 제14항에 있어서, 상기 가열 램프는 텅스텐 할로겐 램프를 포함하는 것을 특징으로 하는 시스템.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US23035394A | 1994-04-20 | 1994-04-20 | |
US8/230,353 | 1994-04-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950034495A true KR950034495A (ko) | 1995-12-28 |
Family
ID=22864897
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950009182A KR950034495A (ko) | 1994-04-20 | 1995-04-19 | 반도체 장치 제조를 위한 고 수율 광 경화 공정 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5972803A (ko) |
EP (1) | EP0684635A3 (ko) |
JP (1) | JPH0845924A (ko) |
KR (1) | KR950034495A (ko) |
TW (1) | TW369696B (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6169039B1 (en) * | 1998-11-06 | 2001-01-02 | Advanced Micro Devices, Inc. | Electron bean curing of low-k dielectrics in integrated circuits |
US20020005539A1 (en) | 2000-04-04 | 2002-01-17 | John Whitman | Spin coating for maximum fill characteristic yielding a planarized thin film surface |
KR100739955B1 (ko) * | 2000-06-30 | 2007-07-16 | 동경 엘렉트론 주식회사 | 반도체 장치의 제조 방법 |
US6303524B1 (en) | 2001-02-20 | 2001-10-16 | Mattson Thermal Products Inc. | High temperature short time curing of low dielectric constant materials using rapid thermal processing techniques |
US6531412B2 (en) * | 2001-08-10 | 2003-03-11 | International Business Machines Corporation | Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications |
US7902042B2 (en) * | 2004-09-13 | 2011-03-08 | Shin-Etsu Handotai Co., Ltd. | Method of manufacturing SOI wafer and thus-manufactured SOI wafer |
DE102006015096B4 (de) * | 2006-03-31 | 2011-08-18 | Globalfoundries Inc. | Verfahren zur Verringerung der durch Polieren hervorgerufenen Schäden in einer Kontaktstruktur durch Bilden einer Deckschicht |
US7750470B2 (en) * | 2007-02-08 | 2010-07-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods for planarization of dielectric layer around metal patterns for optical efficiency enhancement |
KR101015534B1 (ko) * | 2008-10-15 | 2011-02-16 | 주식회사 동부하이텍 | 저유전 상수를 갖는 절연막 및 이를 이용한 에어갭 제조 방법 |
US9941157B2 (en) | 2015-06-26 | 2018-04-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Porogen bonded gap filling material in semiconductor manufacturing |
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US4385344A (en) * | 1980-08-29 | 1983-05-24 | Dentsply Research & Development Corp. | Visible light apparatus for curing photo-curable compositions |
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US4510173A (en) * | 1983-04-25 | 1985-04-09 | Kabushiki Kaisha Toshiba | Method for forming flattened film |
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US4832777A (en) * | 1987-07-16 | 1989-05-23 | Texas Instruments Incorporated | Processing apparatus and method |
US4830700A (en) * | 1987-07-16 | 1989-05-16 | Texas Instruments Incorporated | Processing apparatus and method |
US5248636A (en) * | 1987-07-16 | 1993-09-28 | Texas Instruments Incorporated | Processing method using both a remotely generated plasma and an in-situ plasma with UV irradiation |
US4842686A (en) * | 1987-07-17 | 1989-06-27 | Texas Instruments Incorporated | Wafer processing apparatus and method |
JPH01248528A (ja) * | 1988-03-30 | 1989-10-04 | Ushio Inc | Sog膜の硬化方法 |
US5270259A (en) * | 1988-06-21 | 1993-12-14 | Hitachi, Ltd. | Method for fabricating an insulating film from a silicone resin using O.sub. |
KR910008980B1 (ko) * | 1988-12-20 | 1991-10-26 | 현대전자산업 주식회사 | 자외선을 이용한 s.o.g 박막 경화 방법 |
US5192715A (en) * | 1989-07-25 | 1993-03-09 | Advanced Micro Devices, Inc. | Process for avoiding spin-on-glass cracking in high aspect ratio cavities |
CA2009518C (en) * | 1990-02-07 | 2000-10-17 | Luc Ouellet | Spin-on glass processing technique for the fabrication of semiconductor device |
US5024969A (en) * | 1990-02-23 | 1991-06-18 | Reche John J | Hybrid circuit structure fabrication methods using high energy electron beam curing |
US5236551A (en) * | 1990-05-10 | 1993-08-17 | Microelectronics And Computer Technology Corporation | Rework of polymeric dielectric electrical interconnect by laser photoablation |
US5059448A (en) * | 1990-06-18 | 1991-10-22 | Dow Corning Corporation | Rapid thermal process for obtaining silica coatings |
US5514616A (en) * | 1991-08-26 | 1996-05-07 | Lsi Logic Corporation | Depositing and densifying glass to planarize layers in semi-conductor devices based on CMOS structures |
JPH0621241A (ja) * | 1992-07-01 | 1994-01-28 | Seiko Epson Corp | 半導体装置の製造方法 |
US5254497A (en) * | 1992-07-06 | 1993-10-19 | Taiwan Semiconductor Manufacturing Company | Method of eliminating degradation of a multilayer metallurgy/insulator structure of a VLSI integrated circuit |
US5458912A (en) * | 1993-03-08 | 1995-10-17 | Dow Corning Corporation | Tamper-proof electronic coatings |
US5376586A (en) * | 1993-05-19 | 1994-12-27 | Fujitsu Limited | Method of curing thin films of organic dielectric material |
JP3724592B2 (ja) * | 1993-07-26 | 2005-12-07 | ハイニックス セミコンダクター アメリカ インコーポレイテッド | 半導体基板の平坦化方法 |
US5393703A (en) * | 1993-11-12 | 1995-02-28 | Motorola, Inc. | Process for forming a conductive layer for semiconductor devices |
US5438022A (en) * | 1993-12-14 | 1995-08-01 | At&T Global Information Solutions Company | Method for using low dielectric constant material in integrated circuit fabrication |
US5476817A (en) * | 1994-05-31 | 1995-12-19 | Texas Instruments Incorporated | Method of making reliable metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers |
-
1995
- 1995-04-19 KR KR1019950009182A patent/KR950034495A/ko not_active Application Discontinuation
- 1995-04-20 JP JP7095432A patent/JPH0845924A/ja active Pending
- 1995-04-20 EP EP95105909A patent/EP0684635A3/en not_active Withdrawn
- 1995-07-17 TW TW084107344A patent/TW369696B/zh not_active IP Right Cessation
-
1997
- 1997-10-22 US US08/955,422 patent/US5972803A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0684635A2 (en) | 1995-11-29 |
TW369696B (en) | 1999-09-11 |
JPH0845924A (ja) | 1996-02-16 |
US5972803A (en) | 1999-10-26 |
EP0684635A3 (en) | 1997-12-29 |
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